参数资料
型号: AT26DF321-SU
厂商: Atmel
文件页数: 24/34页
文件大小: 0K
描述: IC FLASH 32MBIT 66MHZ 8SOIC
标准包装: 95
格式 - 存储器: 闪存
存储器类型: DataFLASH
存储容量: 32M(16384 页 x 256 字节)
速度: 66MHz
接口: SPI 3 线串行
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.209",5.30mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
11.2
Deep Power-Down
During normal operation, the device will be placed in the standby mode to consume less power
as long as the CS pin remains deasserted and no internal operation is in progress. The Deep
Power-Down command offers the ability to place the device into an even lower power consump-
tion state called the Deep Power-Down mode.
When the device is in the Deep Power-Down mode, all commands including the Read Status
Register command will be ignored with the exception of the Resume from Deep Power-Down
command. Since all commands will be ignored, the mode can be used as an extra protection
mechanism against program and erase operations.
Entering the Deep Power-Down mode is accomplished by simply asserting the CS pin, clocking
in the opcode of B9h, and then deasserting the CS pin. Any additional data clocked into the
device after the opcode will be ignored. When the CS pin is deasserted, the device will enter the
Deep Power-Down mode within the maximum time of t EDPD .
The complete opcode must be clocked in before the CS pin is deasserted; otherwise, the device
will abort the operation and return to the standby mode once the CS pin is deasserted. In addi-
tion, the device will default to the standby mode after a power-cycle or a device reset.
The Deep Power-Down command will be ignored if an internally self-timed operation such as a
program or erase cycle is in progress. The Deep Power-Down command must be reissued after
the internally self-timed operation has been completed in order for the device to enter the Deep
Power-Down mode.
Figure 11-2. Deep Power-Down
CS
t EDPD
0
1
2
3
4
5
6
7
SCK
OPCODE
SI
1
0
1
1
1
0
0
1
MSB
SO
HIGH-IMPEDANCE
Active Current
I CC
Standby Mode Current
Deep Power-Down Mode Current
24
AT26DF321
3633F–DFLASH–5/7/08
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