参数资料
型号: AT28C010-12JA
厂商: Atmel
文件页数: 1/16页
文件大小: 0K
描述: IC EEPROM 1MBIT 120NS 32PLCC
标准包装: 32
格式 - 存储器: EEPROMs - 并行
存储器类型: EEPROM
存储容量: 1M (128K x 8)
速度: 120ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
封装/外壳: 32-LCC(J 形引线)
供应商设备封装: 32-PLCC
包装: 管件
Features
? Fast Read Access Time – 120 ns
? Automatic Page Write Operation
– Internal Address and Data Latches for 128 Bytes
– Internal Control Timer
?
Fast Write Cycle Time
– Page Write Cycle Time – 10 ms Maximum
– 1 to 128-byte Page Write Operation
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Low Power Dissipation
– 40 mA Active Current
– 200 μA CMOS Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
– Endurance: 10 4 or 10 5 Cycles
– Data Retention: 10 Years
Single 5V ± 10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option Only
1-megabit
(128K x 8)
Paged Parallel
EEPROM
AT28C010
1. Description
The AT28C010 is a high-performance electrically-erasable and programmable read-
only memory. Its 1 megabit of memory is organized as 131,072 words by 8 bits. Man-
ufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 120 ns with power dissipation of just 220 mW. When the device is
deselected, the CMOS standby current is less than 200 μA.
The AT28C010 is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 128-byte page register to allow
writing of up to 128 bytes simultaneously. During a write cycle, the address and 1 to
128 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA polling of I/O7. Once the end of a write cycle has been detected a
new access for a read or write can begin.
Atmel’s AT28C010 has additional features to ensure high quality and manufacturabil-
ity. The device utilizes internal error correction for extended endurance and improved
data retention characteristics. An optional software data protection mechanism is
available to guard against inadvertent writes. The device also includes an extra
128 bytes of EEPROM for device identification or tracking.
0353I–PEEPR–08/09
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