参数资料
| 型号： | AT28C16-15JC |
| 厂商： | Atmel |
| 文件页数： | 3/12页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 16KBIT 150NS 32PLCC |
| 标准包装： | 32 |
| 格式 - 存储器： | EEPROMs - 并行 |
| 存储器类型： | EEPROM |
| 存储容量： | 16K (2K x 8) |
| 速度： | 150ns |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 32-LCC（J 形引线） |
| 供应商设备封装： | 32-PLCC |
| 包装： | 管件 |
AT28C16
Device Operation
READ: The AT28C16 is accessed like a Static RAM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. Th e outputs are put in a high
impedance state whenever CE or OE is high. This dual line
control gives designers increased flexibility in preventing
bus contention.
BYTE WRITE: Writing data into the AT28C16 is similar to
writing into a Static RAM. A low pulse on the WE or CE
input with OE high and CE or WE low (respectively) ini-
tiates a byte write. The address location is latched on the
last falling edge of WE (or CE); the new data is latched on
the first rising edge. Internally, the device performs a self-
clear before write. Once a byte write has been started, it
will automatically time itself to completion. Once a pro-
gramming operation has been initiated and for the duration
of t WC , a read operation will effectively be a polling opera-
tion.
FAST BYTE WRITE: The AT28C16E offers a byte write
time of 200 μ s maximum. This feature allows the entire
device to be rewritten in 0.4 seconds.
DATA POLLING: The AT28C16 provides DATA POLLING
cycle, an attempted read of the data being written results in
the complement of that data for I/O 7 (the other outputs are
indeterminate). When the write cycle is finished, true data
appears on all outputs.
WRITE PROTECTION: Inadvertent writes to the device
are protected against in the following ways: (a) V C C
sense—if V CC is below 3.8V (typical) the write function is
inhibited; (b) V CC power on delay—once V CC has reached
3.8V the device will automatically time out 5 ms (typical)
before allowing a byte write; and (c) write inhibit—holding
any one of OE low, CE high or WE high inhibits byte write
cycles.
CHIP CLEAR : The contents of the entire memory of the
AT28C16 may be set to the high state by the CHIP CLEAR
operation. By setting CE low and OE to 12 volts, the chip is
cleared when a 10 msec low pulse is applied to WE.
D E V I C E I DE NT I F I C A T I O N : A n e x t r a 3 2 b y t e s o f
EEPROM memory are available to the user for device iden-
tification. By raising A9 to 12 ± 0.5V and using address
locations 7E0H to 7FFH the additional bytes may be written
to or read from in the same manner as the regular memory
array.
to signal the completion of a write cycle. During a write
3
相关PDF资料 |
PDF描述 |
|---|---|
| AT28C010-15TI | IC EEPROM 1MBIT 150NS 32TSOP |
| AT28C010-15TC | IC EEPROM 1MBIT 150NS 32TSOP |
| AT28C010-15PI | IC EEPROM 1MBIT 150NS 32DIP |
| AT28C010-15PC | IC EEPROM 1MBIT 150NS 32DIP |
| 20-101-0356 | COMPUTER SINGLE-BOARD BL1800 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT28C16-15JI | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:16K 2K x 8 CMOS E2PROM |
| AT28C16-15LC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8 EEPROM |
| AT28C16-15LI | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8 EEPROM |
| AT28C16-15LM | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8 EEPROM |
| AT28C16-15LM/883 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8 EEPROM |
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