参数资料
型号: AT28HC64B-90PI
厂商: ATMEL CORP
元件分类: DRAM
英文描述: High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrators 16-SOIC -55 to 125
中文描述: 8K X 8 EEPROM 5V, 90 ns, PDIP28
封装: 15.24MM, PLASTIC, MS-011AB, DIP-28
文件页数: 8/12页
文件大小: 661K
代理商: AT28HC64B-90PI
Software Protected Write Cycle Waveforms
(1, 2)
Notes: 1. A6 through A12 must specify the same page address during each high to low transition of WE (or CE) after
the software code has been entered.
2. OE must be high only when WE and CE are both low.
LOAD LAST BYTE
TO
LAST ADDRESS
LOAD DATA A0
TO
ADDRESS 1555
LOAD DATA 55
TO
ADDRESS 0AAA
LOAD DATA AA
TO
ADDRESS 1555
Notes for software program code:
1. Data Format: I/O7 - I/O0 (Hex);
Address Format: A12 - A0 (Hex).
2. Write Protect state will be activated at end of write even if no
other data is loaded.
3. Write Protect state will be deactivated at end of write period
even if no other data is loaded.
4. 1 to 64-bytes of data are loaded.
ENTER DATA
PROTECT STATE
WRITES ENABLED
(2)
Software Data
Protection Enable
Algorithm
(1)
LOAD DATA XX
TO
ANY ADDRESS
(4)
LOAD LAST BYTE
TO
LAST ADDRESS
LOAD DATA 55
TO
ADDRESS 0AAA
LOAD DATA AA
TO
ADDRESS 1555
LOAD DATA 80
TO
ADDRESS 1555
LOAD DATA 55
TO
ADDRESS 0AAA
LOAD DATA AA
TO
ADDRESS 1555
LOAD DATA 20
TO
ADDRESS 1555
EXIT DATA
PROTECT STATE
(3)
Software Data
Protection Disable
Algorithm
(1)
LOAD DATA XX
TO
ANY ADDRESS
(4)
2-274
AT28HC64B
相关PDF资料
PDF描述
AT28HC64B-90SC High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrators 16-SOIC -55 to 125
AT28HC64B-90SI High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrators 16-SOIC -55 to 125
AT28HC64B-90TC High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrators 16-SOIC -55 to 125
AT28HC64B-90TI High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrators 16-SOIC -55 to 125
AT28HC64B-12TC High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer with Input Latches 24-SOIC -55 to 125
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参数描述
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