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参数资料
| 型号： | AT29C1024-12JC |
| 厂商： | ATMEL CORP |
| 元件分类： | DRAM |
| 英文描述： | 1 Megabit 64K x 16 5-volt Only CMOS Flash Memory |
| 中文描述： | 64K X 16 FLASH 5V PROM, 120 ns, PQCC44 |
| 封装： | PLASTIC, MS-018AC, LCC-44 |
| 文件页数： | 2/12页 |
| 文件大小： | 705K |
| 代理商： | AT29C1024-12JC |
(continued)
To allow for simple in-system reprogrammability, the
AT29C1024 does not require high input voltages for pro-
gramming. Five-volt-only commands determine the opera-
tion of the device. Reading data out of the device is similar
to reading from an EPROM. Reprogramming the
AT29C1024 is performed on a sector basis; 128 words of
data are loaded into the device and then simultaneously
programmed.
During a reprogram cycle, the address locations and 128
words of data are internally latched, freeing the address
and data bus for other operations. Following the initiation
of a program cycle, the device will automatically erase the
sector and then program the latched data using an internal
control timer. The end of a program cycle can be detected
by DATA polling of I/O7 or I/O15. Once the end of a pro-
gram cycle has been detected, a new access for a read or
program can begin.
Description
(Continued)
Device Operation
READ:
The AT29C1024 is accessed like an EPROM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in the high
impedance state whenever CE or OE is high. This dual-
line control gives designers flexibility in preventing bus
contention.
DATA LOAD:
Data loads are used to enter the 128
words of a sector to be programmed or the software codes
for data protection. A data load is performed by applying a
low pulse on the WE or CE input with CE or WE low (re-
spectively) and OE high. The address is latched on the
falling edge of CE or WE, whichever occurs last. The data
is latched by the first rising edge of CE or WE.
PROGRAM: The device is reprogrammed on a sector
basis. If a word of data within a sector is to be changed,
data for the entire sector must be loaded into the device.
Any word that is not loaded during the programming of its
sector will be erased to read FFH. Once the words of a
sector are loaded into the device, they are simultaneously
programmed during the internal programming period. Af-
ter the first data word has been loaded into the device,
successive words are entered in the same manner. Each
new word to be programmed must have its high to low
transition on WE (or CE) within 150
μ
s of the low to high
transition of WE (or CE) of the preceding word. If a high to
low transition is not detected within 150
μ
s of the last low
to high transition, the load period will end and the internal
programming period will start. A7 to A15 specify the sector
AT29C1024
Block Diagram
address. The sector address must be valid during each
high to low transition of WE (or CE). A0 to A6 specify the
word address within the sector. The words may be loaded
in any order; sequential loading is not required. Once a
programming operation has been initiated, and for the du-
ration of t
WC
, a read operation will effectively be a polling
operation.
SOFTWARE DATA PROTECTION:
A software control-
led data protection feature is available on the AT29C1024.
Once the software protection is enabled a software algo-
rithm must be issued to the device before a program may
be performed. The software protection feature may be en-
abled or disabled by the user; when shipped from Atmel,
the software data protection feature is disabled. To enable
the software data protection, a series of three program
commands to specific addresses with specific data must
be performed. After the software data protection is en-
abled the same three program commands must begin
each program cycle in order for the programs to occur. All
software program commands must obey the sector pro-
gram timing specifications. Once set, software data pro-
tection will remain active unless the disable command se-
quence is issued. Power transitions will not reset the soft-
ware data protection feature, however the software fea-
ture will guard against inadvertent program cycles during
power transitions.
4-142
相关PDF资料 |
PDF描述 |
|---|---|
| AT29C1024-12JI | 1 Megabit 64K x 16 5-volt Only CMOS Flash Memory |
| AT29C1024-12TC | 1 Megabit 64K x 16 5-volt Only CMOS Flash Memory |
| AT29C1024-12TI | 1 Megabit 64K x 16 5-volt Only CMOS Flash Memory |
| AT29C1024-15 | 8-Bit Shift Registers With 3-State Output Registers 16-SOIC -55 to 125 |
| AT29C1024-15JC | 8-Bit Shift Registers With 3-State Output Registers 16-SOIC -55 to 125 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT29C1024-12JC-SL161 | 制造商:Atmel Corporation 功能描述:Flash Memory |
| AT29C1024-12JI | 功能描述:IC FLASH 1MBIT 120NS 44PLCC RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:32 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:1M (128K x 8) 速度:120ns 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:32-LCC（J 形引线） 供应商设备封装:32-PLCC 包装:管件 其它名称:AT49BV00112JC |
| AT29C1024-12TC | 功能描述:IC FLASH 1MBIT 120NS 48TSOP RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:32 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:1M (128K x 8) 速度:120ns 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:32-LCC（J 形引线） 供应商设备封装:32-PLCC 包装:管件 其它名称:AT49BV00112JC |
| AT29C1024-12TI | 功能描述:闪存 1M (64kx16) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| AT29C1024-15 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:1 Megabit 64K x 16 5-volt Only CMOS Flash Memory |
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