- 您现在的位置：买卖IC网 > PDF目录381447 > AT29C256-90PC (ATMEL CORP) High Speed CMOS Logic 4-by-4 Register File 16-SOIC -55 to 125 PDF资料下载
参数资料
| 型号： | AT29C256-90PC |
| 厂商： | ATMEL CORP |
| 元件分类： | DRAM |
| 英文描述： | High Speed CMOS Logic 4-by-4 Register File 16-SOIC -55 to 125 |
| 中文描述： | 32K X 8 FLASH 5V PROM, 90 ns, PDIP28 |
| 封装： | 0.600 INCH, PLASTIC, DIP-28 |
| 文件页数： | 2/17页 |
| 文件大小： | 343K |
| 代理商： | AT29C256-90PC |
2
AT29C256
0046P–FLASH–10/04
To allow for simple in-system reprogrammability, the AT29C256 does not require high
input voltages for programming. Five-volt-only commands determine the operation of
the device. Reading data out of the device is similar to reading from a static RAM.
Reprogramming the AT29C256 is performed on a page basis; 64 bytes of data are
loaded into the device and then simultaneously programmed. The contents of the entire
device may be erased by using a six-byte software code (although erasure before pro-
gramming is not needed).
During a reprogram cycle, the address locations and 64 bytes of data are internally
latched, freeing the address and data bus for other operations. Following the initiation of
a program cycle, the device will automatically erase the page and then program the
latched data using an internal control timer. The end of a program cycle can be detected
by DATA polling of I/O7. Once the end of a program cycle has been detected a new
access for a read, program or chip erase can begin.
Block Diagram
Device Operation
READ:
WE is high, the data stored at the memory location determined by the address pins
is asserted on the outputs. The outputs are put in the high impedance state whenever
CE or OE is high. This dual-line control gives designers flexibility in preventing bus
contention.
The AT29C256 is accessed like a static RAM. When CE and OE are low and
BYTE LOAD:
with CE or WE low (respectively) and OE high. The address is latched on the falling
edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of
CE or WE. Byte loads are used to enter the 64 bytes of a page to be programmed or the
software codes for data protection and chip erasure.
A byte load is performed by applying a low pulse on the WE or CE input
相关PDF资料 |
PDF描述 |
|---|---|
| AT29C256-90PI | High Speed CMOS Logic 4-by-4 Register File 16-SOIC -55 to 125 |
| AT29C256-90TC | High Speed CMOS Logic 4-by-4 Register File 16-SOIC -55 to 125 |
| AT29C256-90TI | 8-Bit Identity/Magnitude Comparators (P=Q) with Enable 20-PDIP -55 to 125 |
| AT29C256-12PC | High Speed CMOS Logic 8-Bit Shift Register with Input Storage 16-SOIC -55 to 125 |
| AT29C256-12PI | High Speed CMOS Logic 8-Bit Shift Register with Input Storage 16-SOIC -55 to 125 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT29C256-90PI | 功能描述:闪存 256k (32kx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| AT29C256-90TC | 功能描述:闪存 256k (32kx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| AT29C256-90TC-T | 功能描述:IC FLASH 256KBIT 90NS 28TSOP 制造商:microchip technology 系列:- 包装:带卷（TR） 零件状态:停產 存储器类型:非易失 存储器格式:闪存 技术:FLASH 存储容量:256Kb （32K x 8） 写周期时间 - 字，页:10ms 访问时间:90ns 存储器接口:并联 电压 - 电源:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C（TC） 安装类型:表面贴装 封装/外壳:28-TSSOP（0.465"，11.80mm 宽） 供应商器件封装:28-TSOP 基本零件编号:AT29C256 标准包装:1,500 |
| AT29C256-90TI | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:256K 32K x 8 5-volt Only CMOS Flash Memory |
| AT29C256-90TI-T | 功能描述:IC FLASH 256KBIT 90NS 28TSOP 制造商:microchip technology 系列:- 包装:带卷（TR） 零件状态:停產 存储器类型:非易失 存储器格式:闪存 技术:FLASH 存储容量:256Kb （32K x 8） 写周期时间 - 字，页:10ms 访问时间:90ns 存储器接口:并联 电压 - 电源:4.5 V ~ 5.5 V 工作温度:-40°C ~ 85°C（TC） 安装类型:表面贴装 封装/外壳:28-TSSOP（0.465"，11.80mm 宽） 供应商器件封装:28-TSOP 基本零件编号:AT29C256 标准包装:1,500 |
发布紧急采购，3分钟左右您将得到回复。