参数资料
型号: AT32UC3L032-AUR
厂商: Atmel
文件页数: 74/174页
文件大小: 0K
描述: IC MCU AVR32 32K FLASH 48TQFP
产品培训模块: AVR® UC3 Introduction
标准包装: 1
系列: AVR®32 UC3 L
核心处理器: AVR
芯体尺寸: 32-位
速度: 50MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,DMA,POR,PWM,WDT
输入/输出数: 36
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.62 V ~ 3.6 V
数据转换器: A/D 9x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-TQFP
包装: 剪切带 (CT)
配用: ATSTK600-RC34-ND - STK600 ROUTING CARD AVR
其它名称: AT32UC3L032-AURCT
27
32099I–01/2012
AT32UC3L016/32/64
4.5
Exceptions and Interrupts
In the AVR32 architecture, events are used as a common term for exceptions and interrupts.
AVR32UC incorporates a powerful event handling scheme. The different event sources, like Ille-
gal Op-code and interrupt requests, have different priority levels, ensuring a well-defined
behavior when multiple events are received simultaneously. Additionally, pending events of a
higher priority class may preempt handling of ongoing events of a lower priority class.
When an event occurs, the execution of the instruction stream is halted, and execution is passed
to an event handler at an address specified in Table 4-4 on page 31. Most of the handlers are
placed sequentially in the code space starting at the address specified by EVBA, with four bytes
between each handler. This gives ample space for a jump instruction to be placed there, jump-
ing to the event routine itself. A few critical handlers have larger spacing between them, allowing
the entire event routine to be placed directly at the address specified by the EVBA-relative offset
generated by hardware. All interrupt sources have autovectored interrupt service routine (ISR)
addresses. This allows the interrupt controller to directly specify the ISR address as an address
90
360
MPUPSR2
MPU Privilege Select Register region 2
91
364
MPUPSR3
MPU Privilege Select Register region 3
92
368
MPUPSR4
MPU Privilege Select Register region 4
93
372
MPUPSR5
MPU Privilege Select Register region 5
94
376
MPUPSR6
MPU Privilege Select Register region 6
95
380
MPUPSR7
MPU Privilege Select Register region 7
96
384
MPUCRA
Unused in this version of AVR32UC
97
388
MPUCRB
Unused in this version of AVR32UC
98
392
MPUBRA
Unused in this version of AVR32UC
99
396
MPUBRB
Unused in this version of AVR32UC
100
400
MPUAPRA
MPU Access Permission Register A
101
404
MPUAPRB
MPU Access Permission Register B
102
408
MPUCR
MPU Control Register
103
412
SS_STATUS
Secure State Status Register
104
416
SS_ADRF
Secure State Address Flash Register
105
420
SS_ADRR
Secure State Address RAM Register
106
424
SS_ADR0
Secure State Address 0 Register
107
428
SS_ADR1
Secure State Address 1 Register
108
432
SS_SP_SYS
Secure State Stack Pointer System Register
109
436
SS_SP_APP
Secure State Stack Pointer Application Register
110
440
SS_RAR
Secure State Return Address Register
111
444
SS_RSR
Secure State Return Status Register
112-191
448-764
Reserved
Reserved for future use
192-255
768-1020
IMPL
IMPLEMENTATION DEFINED
Table 4-3.
System Registers (Continued)
Reg #
Address
Name
Function
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