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| 型号： | AT45DB011D-MU |
| 厂商： | ATMEL CORP |
| 元件分类： | DRAM |
| 英文描述： | 1-megabit 2.7-volt DataFlash |
| 中文描述： | 1M X 1 FLASH 2.7V PROM, DSO8 |
| 封装： | 6 X 5 MM, 1 MM HEIGHT, GREEN, MLF-8 |
| 文件页数： | 17/52页 |
| 文件大小： | 1107K |
| 代理商： | AT45DB011D-MU |
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17
3639B–DFLASH–02/07
AT45DB011D [Preliminary]
9.1.3
Read Sector Protection Register Command
To read the Sector Protection Register, the CS pin must first be asserted. Once the CS pin has
been asserted, an opcode of 32H and 3 dummy bytes must be clocked in via the SI pin. After the
last bit of the opcode and dummy bytes have been clocked in, any additional clock pulses on the
SCK pins will result in data for the content of the Sector Protection Register being output on the
SO pin. The first byte corresponds to sector 0 (0a, 0b), the second byte corresponds to sector 1,
the third byte corresponds to sector 2, and the last byte (byte 4) corresponds to sector 3. Once
the last byte of the Sector Protection Register has been clocked out, any additional clock pulses
will result in undefined data being output on the SO pin. The CS must be deasserted to termi-
nate the Read Sector Protection Register operation and put the output into a high-impedance
state.
Note:
xx = Dummy Byte
Figure 9-4.
Read Sector Protection Register
9.1.4
Various Aspects About the Sector Protection Register
The Sector Protection Register is subject to a limit of 10,000 erase/program cycles. Users are
encouraged to carefully evaluate the number of times the Sector Protection Register will be
modified during the course of the applications’ life cycle. If the application requires that the Sec-
tor Protection Register be modified more than the specified limit of 10,000 cycles because the
application needs to temporarily unprotect individual sectors (sector protection remains enabled
while the Sector Protection Register is reprogrammed), then the application will need to limit this
practice. Instead, a combination of temporarily unprotecting individual sectors along with dis-
abling sector protection completely will need to be implemented by the application to ensure that
the limit of 10,000 cycles is not exceeded.
Command
Byte 1
Byte 2
Byte 3
Byte 4
Read Sector Protection Register
32H
xxH
xxH
xxH
Opcode
X
X
X
Data Byte
n
Data Byte
n + 1
CS
Data Byte
n + 3
SI
SO
Each transition
represents
8
b
its
相关PDF资料 |
PDF描述 |
|---|---|
| AT45DB011D-SSU | 1-megabit 2.7-volt DataFlash |
| AT45DB011D-SU | 1-megabit 2.7-volt DataFlash |
| AT45DB011 | 1-megabit 2.7-volt Only Serial DataFlash(1M位 2.7V串行数据闪速存储器) |
| AT45DB021B-CU | 2-megabit 2.7-volt Only DataFlash |
| AT45DB021B-RU | 2-megabit 2.7-volt Only DataFlash |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT45DB011D-SH | 制造商:Atmel Corporation 功能描述:DATAFLASH SERIAL 20MHZ 1MB 45DB011 |
| AT45DB011D-SH SL954 | 制造商:Adesto Technologies Corporation 功能描述:IC FLASH 1MBIT 66MHZ 8SOIC |
| AT45DB011D-SH-B | 功能描述:闪存 1M 2.7-3.6V, 66Mhz Serial 闪存 RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| AT45DB011D-SHET-T | 制造商:Adesto Technologies Corporation 功能描述:8-SOIC-W, IND TEMP, 2.7V, T&R - Tape and Reel |
| AT45DB011D-SHGK-T | 制造商:Adesto Technologies Corporation 功能描述:8-SOIC-W, IND TEMP, 2.7V, T&R - Tape and Reel |
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