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参数资料
| 型号： | AT45DB021B-TC |
| 厂商： | ATMEL CORP |
| 元件分类： | DRAM |
| 英文描述： | 2-megabit 2.7-volt Only DataFlash?? |
| 中文描述： | 2M X 1 FLASH 2.7V PROM, PDSO28 |
| 封装： | 18 X 13.40 MM, PLASTIC, MO-183, TSOP1-28 |
| 文件页数： | 4/33页 |
| 文件大小： | 261K |
| 代理商： | AT45DB021B-TC |
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4
AT45DB021B
1937F
–
DFLSH
–
10/02
cycle, allowing one continuous read operation without the need of additional address
sequences. To perform a continuous read, an opcode of 68H or E8H must be clocked
into the device followed by 24 address bits and 32 don
’
t care bits. The first five bits of
the 24-bit address sequence are reserved for upward and downward compatibility to
larger and smaller density devices (see Notes under
“
Command Sequence for
Read/Write Operations
”
diagram). The next 10 address bits (PA9-PA0) specify which
page of the main memory array to read, and the last nine bits (BA8-BA0) of the 24-bit
address sequence specify the starting byte address within the page. The 32 don
’
t care
bits that follow the 24 address bits are needed to initialize the read operation. Following
the 32 don
’
t care bits, additional clock pulses on the SCK pin will result in serial data
being output on the SO (serial output) pin.
The CS pin must remain low during the loading of the opcode, the address bits, the don
’
t
care bits, and the reading of data. When the end of a page in main memory is reached
during a Continuous Array Read, the device will continue reading at the beginning of the
next page with no delays incurred during the page boundary crossover (the crossover
from the end of one page to the beginning of the next page). When the last bit in the
main memory array has been read, the device will continue reading back at the begin-
ning of the first page of memory. As with crossing over page boundaries, no delays will
be incurred when wrapping around from the end of the array to the beginning of the
array.
A low-to-high transition on the CS pin will terminate the read operation and tri-state the
SO pin. The maximum SCK frequency allowable for the Continuous Array Read is
defined by the f
CAR
specification. The Continuous Array Read bypasses both data buff-
ers and leaves the contents of the buffers unchanged.
MAIN MEMORY PAGE READ:
A Main Memory Page Read allows the user to read data
directly from any one of the 1024 pages in the main memory, bypassing both of the data
buffers and leaving the contents of the buffers unchanged. To start a page read, an
opcode of 52H or D2H must be clocked into the device followed by 24 address bits and
32 don
’
t care bits. The first five bits of the 24-bit address sequence are reserved bits, the
next 10 address bits (PA9-PA0) specify the page address, and the next nine address
bits (BA8-BA0) specify the starting byte address within the page. The 32 don
’
t care bits
which follow the 24 address bits are sent to initialize the read operation. Following the
32 don
’
t care bits, additional pulses on SCK result in serial data being output on the SO
(serial output) pin. The CS pin must remain low during the loading of the opcode, the
address bits, the don
’
t care bits and the reading of data. When the end of a page in main
memory is reached during a Main Memory Page Read, the device will continue reading
at the beginning of the same page. A low-to-high transition on the CS pin will terminate
the read operation and tri-state the SO pin.
BUFFER READ:
Data can be read from either one of the two buffers, using different
opcodes to specify which buffer to read from. An opcode of 54H or D4H is used to read
data from buffer 1, and an opcode of 56H or D6H is used to read data from buffer 2. To
perform a Buffer Read, the eight bits of the opcode must be followed by 15 don
’
t care
bits, nine address bits, and eight don
’
t care bits. Since the buffer size is 264-bytes, nine
address bits (BFA8-BFA0) are required to specify the first byte of data to be read from
the buffer. The CS pin must remain low during the loading of the opcode, the address
bits, the don
’
t care bits and the reading of data. When the end of a buffer is reached, the
device will continue reading back at the beginning of the buffer. A low-to-high transition
on the CS pin will terminate the read operation and tri-state the SO pin.
相关PDF资料 |
PDF描述 |
|---|---|
| AT45DB021B-TI | 2-megabit 2.7-volt Only DataFlash?? |
| AT45DB021B | 2-megabit 2.7-volt Only DataFlash?? |
| AT45DB021D | 2-megabit 2.7-volt DataFlash |
| AT45DB021D_07 | 2-megabit 2.7-volt DataFlash |
| AT45DB021D-MU | 2-megabit 2.7-volt DataFlash |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT45DB021BTI | 制造商:Atmel Corporation 功能描述: |
| AT45DB021B-TI | 功能描述:闪存 2M 2.7V RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| AT45DB021BTU | 制造商:Atmel Corporation 功能描述: |
| AT45DB021B-TU | 功能描述:闪存 DATAFLASH 2M SERIAL 2.7V IND TEMP GREEN RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| AT45DB021D | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:2-megabit 2.7-volt DataFlash |
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