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参数资料
| 型号： | AT45DB041D-SU-2.5 |
| 厂商： | ATMEL CORP |
| 元件分类： | DRAM |
| 英文描述： | 4-megabit 2.5-volt or 2.7-volt DataFlash |
| 中文描述： | 4M X 1 FLASH 2.7V PROM, PDSO8 |
| 封装： | 0.208 INCH, GREEN, PLASTIC, EIAJ, SOIC-8 |
| 文件页数： | 8/53页 |
| 文件大小： | 1085K |
| 代理商： | AT45DB041D-SU-2.5 |
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8
3595H–DFLASH–03/07
AT45DB041D
11 page address bits (A18 - A8) that specify the page in the main memory to be written and
8 don’t care bits. When a low-to-high transition occurs on the CS pin, the part will first erase the
selected page in main memory (the erased state is a logic 1) and then program the data stored
in the buffer into the specified page in main memory. Both the erase and the programming of the
page are internally self-timed and should take place in a maximum time of t
EP
. During this time,
the status register will indicate that the part is busy.
7.3
Buffer to Main Memory Page Program without Built-in Erase
A previously-erased page within main memory can be programmed with the contents of either
buffer 1 or buffer 2. A 1-byte opcode, 88H for buffer 1 or 89H for buffer 2, must be clocked into
the device. For the DataFlash standard page size (264 bytes), the opcode must be followed by
three address bytes consist of 4 don’t care bits, 11 page address bits (PA10 - PA0) that specify
the page in the main memory to be written and 9 don’t care bits. To perform a buffer to main
memory page program without built-in erase for the binary page size (256 bytes), the opcode
88H for buffer 1 or 89H for buffer 2, must be clocked into the device followed by three address
bytes consisting of 5 don’t care bits, 11 page address bits (A18 - A8) that specify the page in the
main memory to be written and 8 don’t care bits. When a low-to-high transition occurs on the CS
pin, the part will program the data stored in the buffer into the specified page in the main mem-
ory. It is necessary that the page in main memory that is being programmed has been previously
erased using one of the erase commands (Page Erase or Block Erase). The programming of the
page is internally self-timed and should take place in a maximum time of t
P
. During this time, the
status register will indicate that the part is busy.
7.4
Page Erase
The Page Erase command can be used to individually erase any page in the main memory array
allowing the Buffer to Main Memory Page Program to be utilized at a later time. To perform a
page erase in the DataFlash standard page size (264 bytes), an opcode of 81H must be loaded
into the device, followed by three address bytes comprised of 4 don’t care bits, 11 page address
bits (PA10 - PA0) that specify the page in the main memory to be erased and 9 don’t care bits.
To perform a page erase in the binary page size (256 bytes), the opcode 81H must be loaded
into the device, followed by three address bytes consist of 5 don’t care bits, 11 page address bits
(A18 - A8) that specify the page in the main memory to be erased and 8 don’t care bits. When a
low-to-high transition occurs on the CS pin, the part will erase the selected page (the erased
state is a logical 1). The erase operation is internally self-timed and should take place in a maxi-
mum time of t
PE
. During this time, the status register will indicate that the part is busy.
7.5
Block Erase
A block of eight pages can be erased at one time. This command is useful when large amounts
of data has to be written into the device. This will avoid using multiple Page Erase Commands.
To perform a block erase for the DataFlash standard page size (264 bytes), an opcode of 50H
must be loaded into the device, followed by three address bytes comprised of 4 don’t care bits,
8 page address bits (PA10 - PA3) and 12 don’t care bits. The 8 page address bits are used to
specify which block of eight pages is to be erased. To perform a block erase for the binary page
size (256 bytes), the opcode 50H must be loaded into the device, followed by three address
bytes consisting of 5 don’t care bits, 8 page address bits (A18 - A11) and 11 don’t care bits. The
9 page address bits are used to specify which block of eight pages is to be erased. When a low-
to-high transition occurs on the CS pin, the part will erase the selected block of eight pages. The
erase operation is internally self-timed and should take place in a maximum time of t
BE
. During
this time, the status register will indicate that the part is busy.
相关PDF资料 |
PDF描述 |
|---|---|
| AT45DB080 | KJL SERIES I |
| AT45DB080-RC | 8-Megabit 2.7-volt Only Sequential Access Parallel I/O DataFlash |
| AT45DB080-RI | 8-Megabit 2.7-volt Only Sequential Access Parallel I/O DataFlash |
| AT45DB080-TC | 8-Megabit 2.7-volt Only Sequential Access Parallel I/O DataFlash |
| AT45DB080-TI | 8-Megabit 2.7-volt Only Sequential Access Parallel I/O DataFlash |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT45DB041D-SUEX-B | 制造商:Adesto Technologies Corporation 功能描述:8-SOIC-W, IND TEMP, 2.7V, TUBE - Rail/Tube |
| AT45DB041D-SUEX-T | 制造商:Adesto Technologies Corporation 功能描述:8-SOIC-W, IND TEMP, 2.7V - Bulk 制造商:Atmel 功能描述:IC:MEMORY-FLASH |
| AT45DB041D-SUHT-T | 制造商:Adesto Technologies Corporation 功能描述:8-SOIC-W, EXT TEMP, NON-AECQ, 2.7V, T&R - Tape and Reel |
| AT45DB041D-SU-SL383 | 制造商:Adesto Technologies Corporation 功能描述:8-SOIC-W, IND TEMP, 2.7V, T&R - Tape and Reel 制造商:Adesto Technologies Corporation 功能描述:IC FLASH 4MBIT 66MHZ 8SOIC |
| AT45DB041D-SU-SL954 | 制造商:Adesto Technologies Corporation 功能描述:IC FLASH 4MBIT 66MHZ 8SOIC |
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