参数资料
型号: AT49BV2048A-90TI
厂商: ATMEL CORP
元件分类: DRAM
英文描述: 2-megabit (256K x 8/128K x 16) Single 2.7-volt Battery-Voltage⑩ Flash Memory
中文描述: 128K X 16 FLASH 2.7V PROM, 90 ns, PDSO48
封装: 12 X 20 MM, PLASTIC, TSOP1-48
文件页数: 2/17页
文件大小: 263K
代理商: AT49BV2048A-90TI
2
AT49BV/LV2048A
1914D–FLASH–03/02
The typical number of program and erase cycles is in excess of 10,000 cycles.
5.5 volts or less are used. The boot sector is designed to contain user secure code.
I/O15 are active and controlled by CE and OE.
stated and the I/O15 pin is used as an input for the LSB (A-1) address function.
AT49BV/LV2048A SOIC (SOP)
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VPP
NC
NC
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
I/O0
I/O8
I/O1
I/O9
I/O2
I/O10
I/O3
I/O11
RESET
WE
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
GND
I/O15/A-1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
VCC
AT49BV/LV2048A TSOP Top View
Type 1
Note:
” denotes a white dot on the package.
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48
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A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE
RESET
VPP
NC
NC
NC
NC
A7
A6
A5
A4
A3
A2
A1
A16
BYTE
GND
I/O15/A-1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
VCC
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
OE
GND
CE
A0
The device is erased by executing the Erase command sequence; the device internally con-
trols the erase operation. The memory is divided into four blocks for erase operations. There
are two 4K word parameter block sections, the boot block, and the main memory array block.
The 8K word boot block section includes a reprogramming lock out feature to provide data
integrity. This feature is enabled by a command sequence. Once the boot block programming
lockout feature is enabled, the data in the boot block cannot be changed when input levels of
The BYTE pin controls whether the device data I/O pins operate in the byte or word configura-
tion. If the BYTE pin is set at a logic “1” or left open, the device is in word configuration, I/O0 -
If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins
I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-
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