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参数资料
| 型号： | AT49BV8192A-12TC |
| 厂商： | ATMEL CORP |
| 元件分类： | DRAM |
| 英文描述： | 8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
| 中文描述： | 1M X 8 FLASH 5V PROM, 120 ns, PDSO48 |
| 封装： | PLASTIC, MO-142D, TSOP-48 |
| 文件页数： | 3/16页 |
| 文件大小： | 246K |
| 代理商： | AT49BV8192A-12TC |
AT49BV008A(T)/8192A(T)
3
AT49BV008A(T) Block Diagram
AT49BV8192A(T) Block Diagram
Device Operation
READ:
The AT49BV008A(T)/8192A(T) is accessed like an
EPROM. When CE and OE are low and WE is high, the
data stored at the memory location determined by the
address pins is asserted on the outputs. The outputs are
put in the high impedance state whenever CE or OE is
high. This dual-line control gives designers flexibility in pre-
venting bus contention.
COMMAND SEQUENCES:
When the device is first pow-
ered on it will be reset to the read or standby mode
depending upon the state of the control line inputs. In order
to perform other device functions, a series of command
sequences are entered into the device. The command
sequences are shown in the Command Definitions table
(I/O8 - I/O15 are don't care inputs for the command codes).
The command sequences are written by applying a low
pulse on the WE or CE input with CE or WE low (respec-
tively) and OE high. The address is latched on the falling
edge of CE or WE, whichever occurs last. The data is
latched by the first rising edge of CE or WE. Standard
microprocessor write timings are used. The address loca-
tions used in the command sequences are not affected by
entering the command sequences.
RESET:
A RESET input pin is provided to ease some sys-
tem applications. When RESET is at a logic high level, the
V
PP
GND
V
CC
OE
WE
CE
CONTROL
LOGIC
DATA INPUTS/OUTPUTS
I/O0 - I/O7
DATA INPUTS/OUTPUTS
I/O0 - I/O7
RESET
ADDRESS
INPUTS
Y DECODER
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
Y-GATING
AT49BV008A
AT49BV008AT
Y-GATING
FFFFF
FFFFF
MAIN MEMORY
(992K BYTES)
BOOT BLOCK
16K BYTES
PARAMETER
BLOCK 2
8K BYTES
PARAMETER
BLOCK 1
8K BYTES
PARAMETER
BLOCK 1
8K BYTES
PARAMETER
BLOCK 2
8K BYTES
BOOT BLOCK
16K BYTES
MAIN MEMORY
(992K BYTES)
08000
07FFF
FC000
FBFFF
06000
05FFF
7A000
79FFF
X DECODER
04000
03FFF
78000
77FFF
00000
00000
V
PP
GND
V
CC
OE
WE
CE
CONTROL
LOGIC
DATA INPUTS/OUTPUTS
I/O0 - I/O15
DATA INPUTS/OUTPUTS
I/O0 - I/O15
RESET
ADDRESS
INPUTS
Y DECODER
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
Y-GATING
AT49BV8192A
AT49BV8192AT
Y-GATING
7FFFF
7FFFF
MAIN MEMORY
(496K WORDS)
BOOT BLOCK
8K WORDS
PARAMETER
BLOCK 2
4K WORDS
PARAMETER
BLOCK 1
4K WORDS
PARAMETER
BLOCK 1
4K WORDS
PARAMETER
BLOCK 2
4K WORDS
BOOT BLOCK
8K WORDS
MAIN MEMORY
(496K WORDS)
04000
03FFF
7E000
7DFFF
03000
02FFF
7D000
7CFFF
X DECODER
02000
01FFF
7C000
7BFFF
00000
00000
相关PDF资料 |
PDF描述 |
|---|---|
| AT49BV8192A-12TI | 8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
| AT49BV8192A-15CC | 8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
| AT49BV8192A-15CI | 8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
| AT49BV8192A-15TC | 8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
| AT49BV8192A-15TI | 8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT49BV8192A-12TI | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
| AT49BV8192A-15CC | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
| AT49BV8192A-15CI | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-Megabit 1M x 8/ 512K x 16 CMOS Flash Memory |
| AT49BV8192A-15RC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8/x16 Flash EEPROM |
| AT49BV8192A-15RI | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8/x16 Flash EEPROM |
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