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参数资料
| 型号： | AT49LV8192A |
| 厂商： | Atmel Corp. |
| 英文描述： | 8-megabit 3-volt Flash Memory(8M位 3V闪速存储器) |
| 中文描述： | 8兆位3伏的快闪记忆体（800万位3V的闪速存储器） |
| 文件页数： | 3/16页 |
| 文件大小： | 332K |
| 代理商： | AT49LV8192A |
AT49BV008A(T)/8192A(T)
3
AT49BV008A(T) Block Diagram
AT49BV8192A(T) Block Diagram
Device Operation
READ:
The AT49BV008A(T)/8192A(T) is accessed like an
EPROM. When CE and OE are low and WE is high, the
data stored at the memory location determined by the
address pins is asserted on the outputs. The outputs are
put in the high-impedance state whenever CE or OE is
high. This dual-line control gives designers flexibility in pre-
venting bus contention.
COMMAND SEQUENCES:
When the device is first pow-
ered on it will be reset to the read or standby mode
depending upon the state of the control line inputs. In order
to perform other device functions, a series of command
sequences are entered into the device. The command
sequences are shown in the Command Definitions table
(I/O8 - I/O15 are don
’
t care inputs for the command codes).
The command sequences are written by applying a low
pulse on the WE or CE input with CE or WE low (respec-
tively) and OE high. The address is latched on the falling
edge of CE or WE, whichever occurs last. The data is
latched by the first rising edge of CE or WE. Standard
microprocessor write timings are used. The address loca-
tions used in the command sequences are not affected by
entering the command sequences.
VPP
GND
VCC
OE
WE
CE
CONTROL
LOGIC
DATA INPUTS/OUTPUTS
I/O0 - I/O7
DATA INPUTS/OUTPUTS
I/O0 - I/O7
RESET
ADDRESS
INPUTS
Y DECODER
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
Y-GATING
AT49BV008A
AT49BV008AT
Y-GATING
FFFFF
FFFFF
MAIN MEMORY
(992K BYTES)
BOOT BLOCK
16K BYTES
PARAMETER
BLOCK 2
8K BYTES
PARAMETER
BLOCK 1
8K BYTES
PARAMETER
BLOCK 1
8K BYTES
PARAMETER
BLOCK 2
8K BYTES
BOOT BLOCK
16K BYTES
MAIN MEMORY
(992K BYTES)
08000
07FFF
FC000
FBFFF
06000
05FFF
FA000
F9FFF
X DECODER
04000
03FFF
F8000
F7FFF
00000
00000
VPP
GND
VCC
OE
WE
CE
CONTROL
LOGIC
DATA INPUTS/OUTPUTS
I/O0 - I/O15
DATA INPUTS/OUTPUTS
I/O0 - I/O15
RESET
ADDRESS
INPUTS
Y DECODER
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
Y-GATING
AT49BV8192A
AT49BV8192AT
Y-GATING
7FFFF
7FFFF
MAIN MEMORY
(496K WORDS)
BOOT BLOCK
8K WORDS
PARAMETER
BLOCK 2
4K WORDS
PARAMETER
BLOCK 1
4K WORDS
PARAMETER
BLOCK 1
4K WORDS
PARAMETER
BLOCK 2
4K WORDS
BOOT BLOCK
8K WORDS
MAIN MEMORY
(496K WORDS)
04000
03FFF
7E000
7DFFF
03000
02FFF
7D000
7CFFF
X DECODER
02000
01FFF
7C000
7BFFF
00000
00000
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| AT49LW080-33JX | 功能描述:IC FLASH 8MBIT 33MHZ 32PLCC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1 系列:- 格式 - 存储器:RAM 存储器类型:SDRAM 存储容量:256M（8Mx32） 速度:143MHz 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:90-VFBGA 供应商设备封装:90-VFBGA（8x13） 包装:托盘 其它名称:Q2841869 |
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