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参数资料
| 型号： | AT542 |
| 厂商： | NKK Switches |
| 文件页数： | 37/49页 |
| 文件大小： | 0K |
| 描述： | SMARTSWITCH COUPLER |
| 标准包装： | 1 |
| 附件类型： | 耦合器 |
| 适用于相关产品： | SmartSwitch? 开关 |
| 配用： | IS15ABFP4B-ND - SMARTSWITCH STD BLK W/WHITE LED IS15ABDP4B-ND - SMARTSWITCH STD BLU W/WHITE LED IS15ABDP4EG-ND - SMARTSWITCH STD YELLOW/BLUE LED IS15ABDP4E-ND - SMARTSWITCH STD BLUE W/YEL LED IS15ABCP4EF-ND - SMARTSWITCH STD YEL/GRN LED IS15ABCP4E-ND - SMARTSWITCH STD LED YELLOW 360-2547-ND - SMARTSWITCH STD YEL RED/GRN LED 360-2332-ND - SMARTSWITCH STANDARD RED/GRN/BLU 360-2330-ND - SMARTSWITCH STD RED/GRN LED |
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SmartSwitch
TM
LCD 36 x 24 Display
BLOCK DIAGRAM & PIN CONFIGURATIONS FOR SUPER BRIGHT LEDS
12
1
4
NC
V LC
V DD
36 x 24 Dot Matrix
LCD Panel
seg1 seg36
9
6
FLM
SCP
Timing Control
Segment Driver
7
LP
CK
40bit Latch
IS01BCCF
Yellow LCD Mode
5
Din
CK 40bit
D Shift Register Q
11
Dout
E
3
GND
Single Color
Yellow
Bicolor
10
10
BL-LED (+)
BL-LED (+)
8
2
8
BL-LED (–)
NC
BL-LED (–)
2
BL-LED (–)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
E38
Symbol
V LC
NC
BL-LED (–)
GND
V DD
Din
SCP
LP
BL-LED (–)
FLM
BL-LED (+)
Dout
NC
Name
Power
None
Terminal of Backlight LED
Ground
Power
Data Input
Serial Clock Pulse
Latch Pulse
Terminal of Backlight LED
First Line Marker
Terminal of Backlight LED
Data Output
None
Function
Power source for LCD drive
No connection for single color
Cathode for bicolor
Power source for logic circuit
Display serial data bit. Note: to map the display data, because of the difference between the
number of internal shift register data (40) and the single line of LCD pixels (36), the first four
bits of data shifted will be dummy bits.
Clock used by 40-bit internal shift register of the switch, shifting the display data bit presented
at Din at falling edge.
Line data latch pulse will latch content of internal 40-bit shift register at falling edge for one
line of display. LP will also increment the display line by one.
Cathode: super bright bicolor - red for red/green or yellow for yellow/green
The marking signal for the first line data of LCD display. The first line of LCD will be selected
by the falling edge of LP signal during the high level (FLM).
Anode for common
Display serial output. Can be used to connect to Din of the next SMARTDISPLAY. As a result,
many SMARTDISPLAYS can be controlled with one clock and data signal.
No connection
www.nkk.com
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