参数资料
型号: AT73C240C
厂商: Atmel
文件页数: 14/38页
文件大小: 0K
描述: IC NGD MONOLITHIC NUMERIC 32-QFN
标准包装: 6,000
应用: 手持/移动设备
电流 - 电源: 6mA
电源电压: 3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN 裸露焊盘(5x5)
包装: 托盘
9. TWI Interface
9.1
TWI Architecture
The two-wire interface interconnects components on a unique two-wire bus, made up of one
clock line and one data line with speeds up to 400 Kbits per second, based on a byte oriented
transfer format. The TWI is slave only and has single byte access.
The TWI adds flexibility to the power supply solution, enabling LDO regulator and Audio func-
tionnalities and paths to be controlled depending on the instantaneous application requirements.
The AT73C240 has the following 7-bit address: 1001000 .
Attempting to read data from register addresses not listed in this section results in 0xFF being
read out.
? TWCK is an input pin for the clock
? TWD is an open-drain pin driving or receiving the serial data
The data put on TWD line must be 8 bits long. Data is transferred MSB first. Each byte must be
followed by an acknowledgement.
Each transfer begins with a START condition and terminates with a STOP condition.
? A high-to-low transition on TWD while TWCK is high defines a START condition.
? A low-to-high transition on TWD while TWCK is high defines a STOP condition..
Figure 9-1.
TWI Start and Stop conditions
TWD
TWCK
S t a rt
S top
Figure 9-2.
TWI transfert format
TWD
TWCK
S t a rt
Addre ss
R/W
Ack
D a t a
Ack
D a t a
Ack
S top
After the host initiates a START condition, it sends the 7-bit slave address defined above to
notify the slave device. A read/write bit follows (read = 1, write = 0).
The device acknowledges each received byte. The first byte sent after the device address and
the R/W bit, is the address of the device register the host wants to read or write.
For a write operation the data follows the internal address. For a read operation a repeated
START condition needs to be generated followed by a read on the device.
14
AT73C240
6464A–PMAAC–28-Apr-09
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