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参数资料
型号： AT87C58X2-SLRUM
厂商： Atmel
文件页数： 39/62页
文件大小： 0K
描述： MCU 8051 32K EPROM 44PLCC
标准包装： 500
系列： 87C
核心处理器： 8051
芯体尺寸： 8-位
速度： 40/20MHz
连通性： UART/USART
外围设备： POR，WDT
输入/输出数： 32
程序存储器容量： 32KB（32K x 8）
程序存储器类型： OTP
RAM 容量： 256 x 8
电压 - 电源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 44-LCC（J 形引线）
包装： 带卷 (TR)
44
4431E–8051–04/06
AT/TS8xC54/8X2
19.4
DC Parameters for Low Voltage
TA = 0
°C to +70°C; V
SS = 0 V; VCC = 2.7 V to 5.5 V ± 10%; F = 0 to 30 MHz.
TA = -40
°C to +85°C; V
SS = 0 V; VCC = 2.7 V to 5.5 V ± 10%; F = 0 to 30 MHz.
Table 19-2.
DC Parameters for Low Voltage
1.
I
CC under reset is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure
19-5.), V
IL = VSS + 0.5 V,
V
IH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used..
2.
Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5 V,
VIH = VCC - 0.5 V; XTAL2 N.C; Port 0 = VCC; EA = RST = VSS (see Figure 19-3.).
3.
Power Down I
CC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC.; RST = VSS
(see Figure 19-4.).
4.
Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE
and Ports 1 and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when
these pins make 1 to 0 transitions during bus operation. In the worst cases (capacitive loading 100pF), the noise
pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
VIL
Input Low Voltage
-0.5
0.2 VCC - 0.1
V
VIH
Input High Voltage except XTAL1, RST
0.2 VCC + 0.9
VCC + 0.5
V
IH1
Input High Voltage, XTAL1, RST
0.7 V
CC
V
CC + 0.5
V
OL
Output Low Voltage, ports 1, 2, 3 (6)
0.45
V
I
OL = 0.8 mA
(4)
VOL1
Output Low Voltage, port 0, ALE, PSEN
(6)
0.45
V
IOL = 1.6 mA
(4)
VOH
Output High Voltage, ports 1, 2, 3
0.9 VCC
VIOH = -10 μA
VOH1
Output High Voltage, port 0, ALE, PSEN
0.9 VCC
VIOH = -40 μA
I
IL
Logical 0 Input Current ports 1, 2 and 3
-50
μAVin = 0.45 V
I
LI
Input Leakage Current
±10
μA
0.45 V < Vin < V
CC
ITL
Logical 1 to 0 Transition Current, ports 1, 2, 3
-650
μAVin = 2.0 V
RRST
RST Pulldown Resistor
50
90 (5)
200
k
Ω
CIO
Capacitance of I/O Buffer
10
pF
Fc = 1 MHz
TA = 25
°C
IPD
Power Down Current
20 (5)
10 (5)
50
30
μA
VCC = 2.0 V to 5.5 V
(3)
VCC = 2.0 V to 3.3 V
(3)
ICC
under
RESET
Power Supply Current Maximum values, X1
mode:
(7)
1 + 0.2 Freq
(MHz)
@12MHz 3.4
@16MHz 4.2
mA
VCC = 3.3 V
(1)
I
CC
operating
Power Supply Current Maximum values, X1
mode: (7)
1 + 0.3 Freq
(MHz)
@12MHz 4.6
@16MHz 5.8
mA
V
CC = 3.3 V
(8)
ICC
idle
Power Supply Current Maximum values, X1
mode: (7)
0.15 Freq (MHz)
+ 0.2
@12MHz 2
@16MHz 2.6
mA
VCC = 3.3 V
(2)
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