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| 型号： | AT89C51RB2-SLSUM |
| 厂商： | Atmel |
| 文件页数： | 104/127页 |
| 文件大小： | 0K |
| 描述： | IC 8051 MCU FLASH 16K 44PLCC |
| 产品培训模块： | MCU Product Line Introduction |
| 标准包装： | 972 |
| 系列： | 89C |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 60MHz |
| 连通性： | SPI，UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 32 |
| 程序存储器容量： | 16KB（16K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 1.25K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LCC（J 形引线） |
| 包装： | 管件 |
| 配用： | AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU AT89STK-11-ND - KIT STARTER FOR AT89C51RX2 |
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78
AT89C51RB2/RC2
4180E–8051–10/06
Table 60. WDTPRG Register
WDTPRG - Watchdog Timer Out Register (0A7h)
Reset Value = XXXX X000
WDT During Power-down
and Idle
In Power-down mode the oscillator stops, which means the WDT also stops. While in
Power-down mode the user does not need to service the WDT. There are two methods
of exiting Power-down mode: by a hardware reset or via a level activated external inter-
rupt which is enabled prior to entering Power-down mode. When Power-down is exited
with hardware reset, servicing the WDT should occur as it normally should whenever the
AT89C51RB2/RC2 is reset. Exiting Power-down with an interrupt is significantly differ-
ent. The interrupt is held low long enough for the oscillator to stabilize. When the
interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the
device while the interrupt pin is held low, the WDT is not started until the interrupt is
pulled high. It is suggested that the WDT be reset during the interrupt service routine.
To ensure that the WDT does not overflow within a few states of exiting of power-down,
it is better to reset the WDT just before entering power-down.
In the Idle mode, the oscillator continues to run. To prevent the WDT from resetting the
AT89C51RB2/RC2 while in Idle mode, the user should always set up a timer that will
periodically exit Idle, service the WDT, and re-enter Idle mode.
76
54
32
1
0
-
S2
S1
S0
Bit
Number
Bit
Mnemonic Description
7-
Reserved
The value read from this bit is undetermined. Do not try to set this bit.
6-
5-
4-
3-
2S2
WDT Time-out Select Bit 2
1S1
WDT Time-out Select Bit 1
0S0
WDT Time-out Select Bit 0
S2
S1
S0Selected Time-out
00
0(214 - 1) machine cycles, 16. 3 ms @ F
OSCA = 12 MHz
00
1(215 - 1) machine cycles, 32.7 ms @ FOSCA = 12 MHz
01
0 (2
16 - 1) machine cycles, 65. 5 ms @ F
OSCA = 12 MHz
01
1(217 - 1) machine cycles, 131 ms @ F
OSCA = 12 MHz
10
0(218 - 1) machine cycles, 262 ms @ FOSCA = 12 MHz
10
1 (2
19 - 1) machine cycles, 542 ms @ F
OSCA = 12 MHz
11
0(220 - 1) machine cycles, 1.05 s @ F
OSCA = 12 MHz
11
1 (221 - 1) machine cycles, 2.09 s @ FOSCA = 12 MHz
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AT89C51RC | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash |
| AT89C51RC_05 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash |
| AT89C51RC_08 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash |
| AT89C51RC2 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 16K/ 32K Bytes Flash |
| AT89C51RC2_0312 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Microcontroller with 16K/32K Bytes Flash |
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