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参数资料
| 型号： | AT89LV55-12PI |
| 厂商： | ATMEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | High Speed CMOS Logic Hex Inverters 14-TSSOP -55 to 125 |
| 中文描述： | 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PDIP40 |
| 封装： | 0.600 INCH, PLASTIC, MS-011AC, DIP-40 |
| 文件页数： | 14/23页 |
| 文件大小： | 595K |
| 代理商： | AT89LV55-12PI |
AT89LV55
4-206
Figure 9.
Programming the Flash Memory
Chip Erase:
The entire Flash array is erased electrically
by using the proper combination of control signals and by
holding ALE/PROG low for 10 ms. The code array is written
with all 1s. The chip erase operation must be executed
before the code memory can be reprogrammed.
Reading the Signature Bytes:
The signature bytes are
read by the same procedure as a normal verification of
locations 030H, and 031H, except that P3.6 and P3.7 must
be pulled to a logic low. The values returned are as follows:
(030H) = 1EH indicates manufactured by Atmel
(031H) = 65H indicates 89LV55
(032H) = FFH indicates 12V programming
Programming Interface
Every code byte in the Flash array can be written, and the
entire array can be erased, by using the appropriate combi-
nation of control signals. The write operation cycle is self-
timed and once initiated, will automatically time itself to
completion.
All major programming vendors offer worldwide support for
the Atmel microcontroller series. Please contact your local
programming vendor for the appropriate software revision.
Figure 10.
Verifying the Flash Memory
P1.0 - P1.7
P3.6
P2.0 - P2.5
A0 - A7
ADDR.
0000H/4FFFH
SEE FLASH
PROGRAMMING
MODES TABLE
3-12 MHz
A8 - A13
A14*
P0
+5V
P2.7
PGM
DATA
PROG
V /V
PP
V
I H
ALE
P3.7
XTAL2
EA
RST
PSEN
XTAL1
GND
V
CC
AT89LV55
P2.6
P3.0
*Programming address line A14 (P3.0) is not the same
as the external memory address line A14 (P2.6)
P1.0 - P1.7
P3.6
P3.7
P2.0 - P2.5
A0 - A7
ADDR.
0000H/4FFFH
SEE FLASH
PROGRAMMING
MODES TABLE
3-12 MHz
A8 - A13
A14*
P0
+5V
P2.7
PGM DATA
(USE 10K
PULLUPS)
V
I H
V
I H
ALE
XTAL2
EA
RST
PSEN
XTAL1
GND
V
CC
AT89LV55
P2.6
P3.0
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