参数资料
型号: AT91SAM7S64C-MU
厂商: Atmel
文件页数: 32/50页
文件大小: 0K
描述: IC ARM7 MCU FLASH 64K 64QFN
产品培训模块: SAM9 MPU Boot Solutions & Application Deployment
MCU Product Line Introduction
标准包装: 260
系列: SAM7S
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 55MHz
连通性: I²C,SPI,SSC,UART/USART,USB
外围设备: 欠压检测/复位,DMA,POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 64KB(64K x 8)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 1.95 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 64-QFN
包装: 托盘
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
AT91SAM7S-EK-ND - KIT EVAL FOR ARM AT91SAM7S
其它名称: AT91SAM7S64B-MU
AT91SAM7S64B-MU-ND
38
SAM7S Series [DATASHEET]
6175KS–ATARM–25-Oct-12
10.8 Serial Synchronous Controller
Provides serial synchronous communication links used in audio and telecom applications
Contains an independent receiver and transmitter and a common clock divider
Offers a configurable frame sync and data length
Receiver and transmitter can be programmed to start automatically or on detection of different event on the frame
sync signal
Receiver and transmitter include a data signal, a clock signal and a frame synchronization signal
10.9 Timer Counter
Three 16-bit Timer Counter Channels
Two output compare or one input capture per channel (except for SAM7S32/16 which have only two
channels connected to the PIO)
Wide range of functions including:
Frequency measurement
Event counting
Interval measurement
Pulse generation
Delay timing
Pulse Width Modulation
Up/down capabilities
Each channel is user-configurable and contains:
Three external clock inputs (The SAM7S32/16 have one)
Five internal clock inputs, as defined in Table 10-5
Two multi-purpose input/output signals
Two global registers that act on all three TC channels
10.10 PWM Controller
Four channels, one 16-bit counter per channel
Common clock generator, providing thirteen different clocks
One Modulo n counter providing eleven clocks
Two independent linear dividers working on modulo n counter outputs
Independent channel programming
Independent enable/disable commands
Independent clock selection
Independent period and duty cycle, with double buffering
Programmable selection of the output waveform polarity
Table 10-5. Timer Counter Clocks Assignment
TC Clock Input
Clock
TIMER_CLOCK1
MCK/2
TIMER_CLOCK2
MCK/8
TIMER_CLOCK3
MCK/32
TIMER_CLOCK4
MCK/128
TIMER_CLOCK5
MCK/1024
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