- 您现在的位置：买卖IC网 > PDF目录19639 > ATF1508ASL-25AI100 (Atmel)IC CPLD 25NS LOW PWR 100TQFP PDF资料下载
参数资料
| 型号： | ATF1508ASL-25AI100 |
| 厂商： | Atmel |
| 文件页数： | 5/31页 |
| 文件大小： | 0K |
| 描述： | IC CPLD 25NS LOW PWR 100TQFP |
| 标准包装： | 90 |
| 系列： | ATF15xx |
| 可编程类型： | 系统内可编程（最少 10,000 次编程/擦除循环） |
| 最大延迟时间 tpd(1)： | 25.0ns |
| 电压电源 - 内部： | 4.5 V ~ 5.5 V |
| 宏单元数： | 128 |
| 输入/输出数： | 80 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 托盘 |
| 其它名称： | ATF1508ASL25AI100 |
第1页第2页第3页第4页当前第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页
13
ATF1508AS(L)
0784P–PLD–7/05
Power-down
Mode
The ATF1508AS includes two pins for optional pin-controlled power-down feature. When this
mode is enabled, the PD pin acts as the power-down pin. When the PD1 and PD2 pin is high,
the device supply current is reduced to less than 10 mA. During power-down, all output data
and internal logic states are latched and held. Therefore, all registered and combinatorial out-
put data remain valid. Any outputs that were in a high-Z state at the onset will remain at high-
Z. During power-down, all input signals except the power-down pin are blocked. Input and I/O
hold latches remain active to ensure that pins do not float to indeterminate levels, further
reducing system power. The power-down pin feature is enabled in the logic design file.
Designs using either power-down pin may not use the PD pin logic array input. However, bur-
ied logic resources in this macrocell may still be used.
Notes:
1. For slow slew outputs, add tSSO.
2. Pin or product term.
Power-down AC Characteristics(1)(2)
Symbol
Parameter
-7
-10
-15
-20
-25
Units
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
tIVDH
Valid I, I/O before PD High
7
10
15
20
25
ns
t
GVDH
Valid OE(2) before PD High
7
10
15
20
25
ns
t
CVDH
Valid Clock(2) before PD High
7
10
15
20
25
ns
tDHIX
I, I/O Don’t Care after PD High
12
15
25
30
35
ns
t
DHGX
OE(2) Don’t Care after PD High
12
15
25
30
35
ns
t
DHCX
Clock(2) Don’t Care after PD High
1215253035
ns
tDLIV
PD Low to Valid I, I/O
1
s
t
DLGV
PD Low to Valid OE (Pin or Term)
1
s
t
DLCV
PD Low to Valid Clock (Pin or Term)
1
s
tDLOV
PD Low to Valid Output
1
s
Absolute Maximum Ratings*
Temperature Under Bias.................................. -40°C to +85°C
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Note:
1. Minimum voltage is -0.6V DC, which may under-
shoot to -2.0V for pulses of less than 20 ns.
Maximum output pin voltage is VCC + 0.75V DC,
which may overshoot to 7.0V for pulses of less
than 20 ns.
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on Input Pins
with Respect to Ground
During Programming.....................................-2.0V to +14.0V(1)
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
相关PDF资料 |
PDF描述 |
|---|---|
| TAJS154M050RNJ | CAP TANT 0.15UF 50V 20% 1206 |
| EBC07DRXN | CONN EDGECARD 14POS DIP .100 SLD |
| ATF1508AS-7QC160 | IC CPLD 7NS 160PQFP |
| VE-BT0-CY-F3 | CONVERTER MOD DC/DC 5V 50W |
| AD596AHZ | IC THERMOCOUPLE COND TO-100-10 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ATF1508ASL-25AI160 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:ASIC |
| ATF1508ASL-25AU100 | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD 128 MACROCELL w/ISP LOW PWR 5V RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ATF1508ASL-25JI84 | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD 128 MACROCELL 5V 25NS IND TEMP RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ATF1508ASL-25JU84 | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD 128 MACROCELL w/ISP LOW PWR 5V RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ATF1508ASL-25QC100 | 功能描述:IC CPLD 25NS LOW PWR 100PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - CPLD（复杂可编程逻辑器件） 系列:ATF15xx 标准包装:40 系列:ispMACH® 4000C 可编程类型:系统内可编程 最大延迟时间 tpd(1):5.0ns 电压电源 - 内部:1.65 V ~ 1.95 V 逻辑元件/逻辑块数目:32 宏单元数:512 门数:- 输入/输出数:128 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:176-LQFP 供应商设备封装:176-TQFP（24x24） 包装:托盘 |
发布紧急采购，3分钟左右您将得到回复。