参数资料
型号: ATF16V8BQL-15PU
厂商: Atmel
文件页数: 5/26页
文件大小: 0K
描述: IC PLD 15NS 20DIP
标准包装: 18
系列: 16V8
可编程类型: EE PLD
宏单元数: 8
输入电压: 5V
速度: 15ns
安装类型: 通孔
封装/外壳: 20-DIP(0.300",7.62mm)
供应商设备封装: 20-PDIP
包装: 管件
产品目录页面: 610 (CN2011-ZH PDF)
13
7707F–AVR–11/10
AT90USB82/162
Figure 4-4.
The Parallel Instruction Fetches and Instruction Executions
Figure 4-5 shows the internal timing concept for the Register File. In a single clock cycle an ALU
operation using two register operands is executed, and the result is stored back to the destina-
tion register.
Figure 4-5.
Single Cycle ALU Operation
4.8
Reset and Interrupt Handling
The AVR provides several different interrupt sources. These interrupts and the separate Reset
Vector each have a separate program vector in the program memory space. All interrupts are
assigned individual enable bits which must be written logic one together with the Global Interrupt
Enable bit in the Status Register in order to enable the interrupt. Depending on the Program
Counter value, interrupts may be automatically disabled when Boot Lock bits BLB02 or BLB12
are programmed. This feature improves software security. See the section “Memory Program-
The lowest addresses in the program memory space are by default defined as the Reset and
Interrupt Vectors. The complete list of vectors is shown in “Interrupts” on page 63. The list also
determines the priority levels of the different interrupts. The lower the address the higher is the
priority level. RESET has the highest priority, and next is INT0 – the External Interrupt Request
0. The Interrupt Vectors can be moved to the start of the Boot Flash section by setting the IVSEL
bit in the MCU Control Register (MCUCR). Refer to “Interrupts” on page 63 for more information.
The Reset Vector can also be moved to the start of the Boot Flash section by programming the
When an interrupt occurs, the Global Interrupt Enable I-bit is cleared and all interrupts are dis-
abled. The user software can write logic one to the I-bit to enable nested interrupts. All enabled
interrupts can then interrupt the current interrupt routine. The I-bit is automatically set when a
Return from Interrupt instruction – RETI – is executed.
clk
1st Instruction Fetch
1st Instruction Execute
2nd Instruction Fetch
2nd Instruction Execute
3rd Instruction Fetch
3rd Instruction Execute
4th Instruction Fetch
T1
T2
T3
T4
CPU
Total Execution Time
Register Operands Fetch
ALU Operation Execute
Result Write Back
T1
T2
T3
T4
clk
CPU
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ATF16V8BQL-15SC 功能描述:EEPLD - 电子擦除可编程逻辑设备 250 GATE 15 NS WAFER - 15NS RoHS:否 制造商:Atmel 逻辑系列:ATF16V8BQL 最大工作频率:62 MHz 可编程输入/输出端数量:20 电源电流:20 mA 延迟时间:15 ns 每个宏指令的积项数:8 电源电压-最大:5.5 V 电源电压-最小:4.5 V 大电池数量:8 最小工作温度:- 40 C 最大工作温度:+ 85 C 安装风格:Through Hole 封装 / 箱体:PDIP-20
ATF16V8BQL-15SI 功能描述:EEPLD - 电子擦除可编程逻辑设备 250 GATE 15 NS WAFER - 15NS RoHS:否 制造商:Atmel 逻辑系列:ATF16V8BQL 最大工作频率:62 MHz 可编程输入/输出端数量:20 电源电流:20 mA 延迟时间:15 ns 每个宏指令的积项数:8 电源电压-最大:5.5 V 电源电压-最小:4.5 V 大电池数量:8 最小工作温度:- 40 C 最大工作温度:+ 85 C 安装风格:Through Hole 封装 / 箱体:PDIP-20
ATF16V8BQL-15SU 功能描述:EEPLD - 电子擦除可编程逻辑设备 15 ns 20 I/O Pins 8 macorcells 8 reg RoHS:否 制造商:Atmel 逻辑系列:ATF16V8BQL 最大工作频率:62 MHz 可编程输入/输出端数量:20 电源电流:20 mA 延迟时间:15 ns 每个宏指令的积项数:8 电源电压-最大:5.5 V 电源电压-最小:4.5 V 大电池数量:8 最小工作温度:- 40 C 最大工作温度:+ 85 C 安装风格:Through Hole 封装 / 箱体:PDIP-20
ATF16V8BQL-15XC 功能描述:EEPLD - 电子擦除可编程逻辑设备 250 GATE 15 NS WAFER - 15NS RoHS:否 制造商:Atmel 逻辑系列:ATF16V8BQL 最大工作频率:62 MHz 可编程输入/输出端数量:20 电源电流:20 mA 延迟时间:15 ns 每个宏指令的积项数:8 电源电压-最大:5.5 V 电源电压-最小:4.5 V 大电池数量:8 最小工作温度:- 40 C 最大工作温度:+ 85 C 安装风格:Through Hole 封装 / 箱体:PDIP-20
ATF16V8BQL-15XI 功能描述:EEPLD - 电子擦除可编程逻辑设备 250 GATE 15 NS WAFER - 15NS RoHS:否 制造商:Atmel 逻辑系列:ATF16V8BQL 最大工作频率:62 MHz 可编程输入/输出端数量:20 电源电流:20 mA 延迟时间:15 ns 每个宏指令的积项数:8 电源电压-最大:5.5 V 电源电压-最小:4.5 V 大电池数量:8 最小工作温度:- 40 C 最大工作温度:+ 85 C 安装风格:Through Hole 封装 / 箱体:PDIP-20