参数资料
型号: ATF22LV10C-15JC
厂商: Atmel
文件页数: 16/19页
文件大小: 0K
描述: IC PLD 15NS 28PLCC
标准包装: 38
系列: 22V10
可编程类型: EE PLD
宏单元数: 10
输入电压: 3.3V
速度: 15ns
安装类型: 表面贴装
封装/外壳: 28-LCC(J 形引线)
供应商设备封装: 28-PLCC(11.51x11.51)
包装: 管件
其它名称: ATF22LV10C15JC
6
0780M–PLD–7/10
Atmel ATF22LV10C
3.7
Power-up Reset
The registers in the Atmel ATF22LV10C are designed to reset during power-up. At a point delayed slightly from
V
CC crossing VRST, all registers will be reset to the low state. The output state will depend on the polarity of the
buffer.
This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the
uncertainty of how V
CC actually rises in the system, the following conditions are required:
1.
The V
CC rise must be monotonic and start below 0.7V
2.
The clock must remain stable during T
PR
3.
After T
PR, all input and feedback setup times must be met before driving the clock pin high
3.8
Preload of Register Outputs
The ATF22LV10C registers are provided with circuitry to allow loading of each register with either a high or a low.
This feature will simplify testing since any state can be forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file with vectors is compiled. Once downloaded, the JEDEC
file preload sequence will be done automatically by most of the approved programmers after the programming.
4.
Electronic Signature Word
There are 64-bits of programmable memory that are always available to the user, even if the device is secured.
These bits can be used for user-specific data.
5.
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying of the ATF22LV10C fuse patterns. Once programmed,
fuse verify and preload are inhibited. However, the 64-bit User Signature remains accessible.
The security fuse should be programmed last, as its effect is immediate.
6.
Programming/Erasing
Programming/erasing is performed using standard PLD programmers. See CMOS PLD Programming Hardware &
Software Support for information on software/programming.
Table 6-1.
Programming/Erasing
7.
Input and I/O Pin-keeper
All ATF22V10C family members have internal input and I/O pin-keeper circuits. Therefore, whenever inputs or
I/Os are not being driven externally, they will maintain their last driven state. This ensures that all logic array inputs
and device outputs are at known states. These are relatively weak active circuits that can be easily overridden by
TTL-compatible drivers (see Input and I/O diagrams on page 7).
Parameter
Description
Typ
Max
Units
T
PR
Power-up Reset Time
600
1,000
ns
V
RST
Power-up Reset Voltage
2.5
3.0
V
相关PDF资料
PDF描述
ATF22LV10C-10XC IC PLD 10NS 24TSSOP
ATF22LV10C-10SI IC PLD EE 10NS 24-SOIC
ATF16V8C-7PC IC PLD 7NS 20DIP
ATF16V8C-7JI IC PLD 7NS 20PLCC
GAL16V8D-7LP IC PLD 3.3V 20DIP
相关代理商/技术参数
参数描述
ATF22LV10C-15JI 功能描述:SPLD - 简单可编程逻辑器件 EEPLD 500GATE STDPWR 3.3V 15NS IND TEMP RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24
ATF22LV10C-15JU 功能描述:SPLD - 简单可编程逻辑器件 ASICS RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24
ATF22LV10C-15PC 功能描述:SPLD - 简单可编程逻辑器件 500 GATE STANDARD POWER 3.3V - 15NS RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24
ATF22LV10C-15PI 功能描述:SPLD - 简单可编程逻辑器件 EEPLD 500GATE STDPWR 3.3V 15NS IND TEMP RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24
ATF22LV10C-15PU 功能描述:SPLD - 简单可编程逻辑器件 ASICS RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24