参数资料
型号: ATF22LV10CZ-25SI
厂商: Atmel
文件页数: 18/19页
文件大小: 0K
描述: IC PLD EE 25NS 24-SOIC
标准包装: 31
系列: 22V10
可编程类型: EE PLD
宏单元数: 10
输入电压: 3.3V
速度: 25ns
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC W
包装: 管件
其它名称: ATF22LV10CZ25SI
8
0779M–PLD–7/10
Atmel ATF22LV10C(Q)Z
Figure 8-2.
I/O Diagram
9.
Functional Logic Diagram Description
The Functional Logic Diagram describes the Atmel ATF22LV10CZ/CQZ architecture.
The ATF22LV10CZ/CQZ has 12 inputs and 10 I/O macrocells. Each macrocell can be configured into one of four
output configurations: active high/low or registered/combinatorial. The universal architecture of the
ATF22LV10CZ/CQZ can be programmed to emulate most 24-pin PAL devices.
Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse,
when programmed, protects the contents of the ATF22LV10CZ/CQZ. Eight bytes (64-fuses) of User Signature are
accessible to the user for purposes such as storing project name, part number, revision or date. The User
Signature is accessible regardless of the state of the security fuse.
100K
VCC
DATA
OE
I/O
INPUT
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