参数资料
| 型号： | ATF22V10CQ-15SI |
| 厂商： | Atmel |
| 文件页数： | 22/22页 |
| 文件大小： | 0K |
| 描述： | IC PLD 15NS "Q" POWER 24-SOIC |
| 标准包装： | 31 |
| 系列： | 22V10 |
| 可编程类型： | EE PLD |
| 宏单元数： | 10 |
| 输入电压： | 5V |
| 速度： | 15ns |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC W |
| 包装： | 管件 |
| 其它名称： | ATF22V10CQ15SI |
9
0735U–PLD–7/10
Atmel ATF22V10C(Q)
9.
Power-down Mode
The Atmel ATF22V10C includes an optional pin-controlled power-down feature. When this mode is enabled, the
PD pin acts as the power-down pin (Pin 4 on the DIP/SOIC packages and Pin 5 on the PLCC package). When the
PD pin is high, the device supply current is reduced to less than 100mA. During power-down, all output data and
internal logic states are latched and held. Therefore, all registered and combinatorial output data remain valid. Any
outputs that were in an undetermined state at the onset of power-down will remain at the same state. During
power-down, all input signals except the power-down pin are blocked. Input and I/O hold latches remain active to
ensure that pins do not float to indeterminate levels, further reducing system power. The power-down pin feature is
enabled in the logic design file. Designs using the power-down pin may not use the PD pin logic array input.
However, all other PD pin macrocell resources may still be used, including the buried feedback and foldback
product term array inputs.
PD pin configuration is controlled by the design file, and appears as a separate fuse bit in the JEDEC file. When
the power-down feature is not specified in the design file, the IN/PD pin will be configured as a regular logic input.
Note:
Some programmers list the 22V10 JEDEC compatible 22V10C (no PD used) separately from the non-22V10 JEDEC
compatible 22V10CEX (with PD used)
10.
Compiler Mode Selection
Note:
1. These device types will create a JEDEC file which when programmed in Atmel ATF22V10C devices will enable the
power-down mode feature. All other device types have the feature disabled
Table 10-1.
Compiler Mode Selection
PAL Mode
(5828 Fuses)
GAL Mode
(5892 Fuses)
Power-down Mode(1)
(5893 Fuses)
Synario
ATF22V10C (DIP)
ATF22V10C (PLCC)
ATTF22V10C DIP (UES)
ATF22C10C PLCC (UES)
ATF22V10C DIP (PWD)
ATF22V10C PLCC (PWD)
WINCUPL
P22V10
P22V10LCC
G22V10
G22V10LCC
G22V10CP
G22V10CPLCC
相关PDF资料 |
PDF描述 |
|---|---|
| ATF22V10CQ-15PI | IC PLD 15NS "Q" POWER 24DIP |
| ATF22V10CQ-15JI | IC PLD 15NS "Q" POWER 28PLCC |
| ATF22V10C-7XC | IC PLD 7NS 24TSSOP |
| FMC26DRAS | CONN EDGECARD 52POS R/A .100 SLD |
| IDT71421SA25J | IC SRAM 16KBIT 25NS 52PLCC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ATF22V10CQ-15XC | 功能描述:SPLD - 简单可编程逻辑器件 500 GATE HI SPD QRTR PWR 5V-15NS RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| ATF22V10CQ-15XI | 功能描述:SPLD - 简单可编程逻辑器件 500 GATE HI SPD QRTR PWR 5V-15NS RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| ATF22V10CQZ | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Highperformance EE PLD |
| ATF22V10CQZ-20JC | 功能描述:SPLD - 简单可编程逻辑器件 500 GATE HI SPD ZERO/QRTR PWR 5V RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| ATF22V10CQZ-20JC-SL383 | 制造商:Atmel Corporation 功能描述:SPLD ATF22V10CQZ Family 500 Gates 10 Macro Cells 50MHz EECMOS Technology 5V 28-Pin PLCC T/R 制造商:Atmel Corporation 功能描述:SPLD ATF22V10CQZ Family 500 Gates 10 Macro Cells 50MHz 5V 28-Pin PLCC T/R |
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