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参数资料
| 型号： | ATF750C-7PX |
| 厂商： | Atmel |
| 文件页数： | 12/25页 |
| 文件大小： | 0K |
| 描述： | IC CPLD 7NS 24PDIP |
| 标准包装： | 15 |
| 系列： | ATF750C(L) |
| 可编程类型： | 系统内可编程（最少 1K 次编程/擦除循环） |
| 最大延迟时间 tpd(1)： | 7.5ns |
| 电压电源 - 内部： | 4.75 V ~ 5.25 V |
| 宏单元数： | 10 |
| 输入/输出数： | 10 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 24-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 24-PDIP |
| 包装： | 管件 |
2
0776L–PLD–11/08
ATF750C(L)
3.
Description
The ATF750C(L)s are twice as powerful as most other 24-pin programmable logic devices.
Increased product terms, sum terms, flip-flops and output logic configurations
translate into more usable gates. High-speed logic and uniform predictable delays guarantee
fast in-system performance. The ATF750C(L) is a high-performance CMOS (electrically-eras-
able) complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-
erasable technology.
Each of the ATF750C(L)’s 22 logic pins can be used as an input. Ten of these can be used as
inputs, outputs or bi-directional I/O pins. Each flip-flop is individually configurable as either D- or
T-type. Each flip-flop output is fed back into the array independently. This allows burying of all
the sum terms and flip-flops.
There are 171 total product terms available. There are two sum terms per output, providing
added flexibility. A variable format is used to assign between four to eight product terms per sum
term. Much more logic can be replaced by this device than by any other 24-pin PLD. With 20
sum terms and flip-flops, complex state machines are easily implemented with logic to spare.
Product terms provide individual clocks and asynchronous resets for each flip-flop. Each flip-flop
may also be individually configured to have direct input pin controlled clocking. Each output has
its own enable product term. One product term provides a common synchronous preset for all
flip-flops. Register preload functions are provided to simplify testing. All registers automatically
reset upon power-up.
The ATF750CL is a low-power device with speeds as fast as 15 ns. The ATF750CL provides the
optimum low-power CPLD solution. This device significantly reduces total system power,
thereby allowing battery-powered operations.
2.
Pin Configurations
Pin
Function
CLK
Clock
IN
Logic Inputs
I/O
Bi-directional Buffers
GND
Ground
VCC
+5V Supply
2.1
DIP/SOIC/TSSOP
2.2
PLCC/LCC
Note:
For PLCC, pins 1, 8, 15, and 22 can be left uncon-
nected. For superior performance, connect VCC to pin 1
and GND to pins 8, 15, and 22.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK/IN
IN
GND
VCC
I/O
IN
5
6
7
8
9
10
11
25
24
23
22
21
20
19
IN
GND(1)
IN
I/O
GND(1)
I/O
4
3
2
1
2
8
27
26
12
13
14
15
16
17
1
8
IN
GND
(1)
IN
I/O
IN
CLK/IN
VCC
(1)
VCC
I/O
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| ATF750C-7JX | IC CPLD 7NS 28PLCC |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ATF750C-7SC | 功能描述:CPLD - 复杂可编程逻辑器件 750 GATE 22V10 COMPATIBLE - 7NS 24 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ATF750C-7SX | 功能描述:CPLD - 复杂可编程逻辑器件 750 GATE EPLD 15NS, CERDIP, 883C RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ATF750CL | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:High-speed Complex Programmable Logic Device |
| ATF750CL-15GM/883 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Electrically-Erasable Complex PLD |
| ATF750CL-15JC | 功能描述:CPLD - 复杂可编程逻辑器件 750 GATE LOW POWER - 15NS 28 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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