参数资料
型号: ATR2730-TCSY
厂商: ATMEL CORP
元件分类: 上/下变频器
英文描述: RF/MICROWAVE DOWN CONVERTER
封装: LEAD FREE, SSO28, 28 PIN
文件页数: 15/18页
文件大小: 274K
代理商: ATR2730-TCSY
6
4903A–DAB–03/06
ATR2730 [Preliminary]
3.4
Voltage-controlled Oscillator
A voltage-controlled oscillator supplies an LO signal to the mixer. An equivalent circuit of this
oscillator is shown in Figure 10-2 on page 14. In the application circuits (Figure 10-3 on page 15
and Figure 11-1 on page 16), a ceramic coaxial resonator is applied to the oscillator's TANK and
VREF pins. It should be noted that V
ref has to be blocked carefully. Figure 11-1 shows a different
application where the oscillator is overdriven by an external oscillator. In either case, a DC path
at a low impedance must be established between the TANK and VREF pins. The output signal
of the oscillator is fed to the LO divider block of the frequency synthesizer unit which locks the
VCO's frequency on the frequency of a reference oscillator. Figure 9-1 on page 13 shows the
typical phase-noise performance of the oscillator in locked state.
3.5
Overall Properties of the Signal Path
The overall gain of this circuit amounts to 24 dB, the gain-control range is about 30 dB. With a
new AGC concept in the amplifier and mixer, the ATR2730 reaches better intermodulation dis-
tances (DIM3) at higher IF-output power levels.
3.6
Power Save Mode
For VPSM > 2V (pin 1) the power consumption in the analog part (gain-controlled amplifier and
mixer and gain-controlled circuitry) is reduced by 80%. The VCO and the PLL is not influenced
by the power-down mode.
3.7
Frequency Synthesizer
The frequency synthesizer block consists of a reference oscillator, a reference divider, an LO
divider in order to divide the frequency of the internal oscillator, a tri-state phase detector, a lock
detector, a programmable charge pump, a loop filter amplifier, a control interface, and a test
interface. The control interface is accessed by three control pins, CI, SI1 and SI2. The test inter-
face provides test signals which represent output signals of the reference and the LO divider.
The purpose of this unit is to lock the frequency f
VCO of the internal VCO on the frequency fref of
the reference signal applied to the input pin OSCB phase-locked loop according to the following
equation:
f
VCO = SF × fref / SFref
where: SF = 2464,
SF
ref is the scaling factor of the reference divider according to Table 3-1
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