参数资料
型号: ATS674LSETN-LT
厂商: Allegro Microsystems Inc
文件页数: 18/20页
文件大小: 968K
描述: IC SENSOR GEAR TOOTH 4LEAD
标准包装: 450
传感范围: 30% 空气间隙跳闸,40% 空气间隙释放
类型: 专用型
电源电压: 3.3 V ~ 26.5 V
电流 - 电源: 11mA
电流 - 输出(最大): 20mA
输出类型: 数字,开路集电极
特点: 轮齿类型
工作温度: -40°C ~ 150°C
封装/外壳: 4-SIP
供应商设备封装: 4-SIP
包装: 带卷 (TR)
Self-Calibrating TPOS Gear Tooth Sensor ICs
Optimized for Automotive Cam Sensing Applications
ATS673 and
ATS674
17
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
The device must be operated below the maximum junction
temperature of the device, T
J(max)
. Under certain combinations of
peak conditions, reliable operation may require derating sup-
plied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating T
J
. (Thermal data is also available on
the Allegro MicroSystems Web site.)
The Package Thermal Resistance, R
qJA
, is a figure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, R
qJC
, is
relatively small component of R
qJA
. Ambient air temperature,
T
A
, and air motion are significant external factors, damped by
overmolding.
The effect of varying power levels (Power Dissipation, P
D
), can
be estimated. The following formulas represent the fundamental
relationships used to estimate T
J
, at P
D
.
  P
D
= V
IN
 
?/DIV>
 I
IN
 
(1)
    DT = P
D
 
?/DIV>
 R
qJA
  (2)
    T
J
 = T
A
 + 擳     (3)
For example, given common conditions such as: T
A
= 25癈,
V
IN
= 12 V, I
IN
= 4 mA, and R
qJA
 = 140 癈/W, then:
    P
D
= V
IN
 
?/DIV>
 I
IN
= 12 V
?/DIV>
 4 mA = 48 mW
   DT = P
D
 
?/DIV>
 R
qJA
 = 48 mW
?/DIV>
 140 癈/W = 7癈
    T
J
 = T
A
 + DT = 25癈 + 7癈 = 32癈
A worst-case estimate, P
D(max)
, represents the maximum allow-
able power level, without exceeding T
J(max)
, at a selected R
qJA
 
and T
A
.
Example: Reliability for V
CC
 at T
A
=
 
150癈, package SE, using
minimum-K PCB.
Observe the worst-case ratings for the device, specifically:
R
qJA
=
 
101 癈/W, T
J(max)
=
 
165癈, V
CC(max)
=
 
26.5
 
V, and
I
CC(max)
=
 
11
 
mA. Note that I
CC(max)
 at T
A
=
 
150癈 is lower than
the I
CC(max)
 at T
A
=
 
25癈 given in the Operating Characteristics
table.
Calculate the maximum allowable power level, P
D(max)
. First,
invert equation 3:
  DT
max
 = T
J(max)
  T
A
 = 165
 
 

 
150
 
癈 = 15
 
This provides the allowable increase to T
J
 resulting from internal
power dissipation. Then, invert equation 2:
  P
D(max)
= DT
max
 ?R
qJA
= 15癈 ?101 癈/W = 91 mW
Finally, invert equation 1 with respect to voltage:
  V
CC(est)
 = P
D(max)
? I
CC(max)
 = 91 mW ?11 mA = 8.3 V
The result indicates that, at T
A
, the application and device can
dissipate adequate amounts of heat at voltages dV
CC(est)
.
Compare V
CC(est)
 to V
CC(max)
. If V
CC(est)
 d V
CC(max)
, then reli-
able operation between V
CC(est)
 and V
CC(max)
 requires enhanced
R
qJA
. If V
CC(est)
 e V
CC(max)
, then operation between V
CC(est)
 and
V
CC(max)
 is reliable under these conditions.
相关PDF资料
PDF描述
6012 PROTO-BRD 12PIN DISCRETE SMD SIP
ATS673LSETN-LT IC SENSOR GEAR TOOTH 4LEAD
US-5016 PROTO-BOARD 16PIN THRU-HOLE SIP
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