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| 型号： | ATS685LSHTN-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 8/15页 |
| 文件大小： | 437K |
| 描述： | IC HALL EFFECT GEAR SENSOR 4SIP |
| 特色产品： | ATS685 Sensor IC |
| 标准包装： | 1 |
| 传感范围： | 5mT ~ 150mT |
| 类型： | 专用型 |
| 电源电压： | 4 V ~ 24 V |
| 电流 - 电源： | 8mA |
| 输出类型： | 数字式，开漏极 |
| 特点： | 轮齿类型 |
| 工作温度： | -40°C ~ 150°C |
| 封装/外壳： | 4-SIP |
| 供应商设备封装： | 4-SIP |
| 包装： | 标准包装 |
| 其它名称： | 620-1399-6 |
Two-Wire, Zero Speed
Differential Gear Tooth Sensor IC
ATS685LSH
8
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Determining Output Signal Polarity
In figure 2, the top panel, labeled Mechanical Position, represents
the mechanical features of the target gear and orientation to the
device. The bottom panel, labeled Device Output Signal, displays
the square waveform corresponding to the digital output signal
(current amplitude) that results from a rotating gear configured
as shown in figure 3. Referring to the target side nearest the face
of the sensor IC, the direction of rotation is: perpendicular to the
leads, across the face of the device, from the pin 1 side to the
pin 4 side.
In order to read the output signal as a voltage, V
SENSE
, a sense
resistor, R
SENSE
, can be placed on either the VCC signal or on
the GND signal. As shown in figure 4, when R
SENSE
is placed on
the GND signal, the output signal voltage, V
SENSE(LowSide)
, is in
phase with I
CC
. When R
SENSE
is placed on the VCC signal, the
output signal voltage, V
SENSE(HighSide)
, is inverted relative to I
CC
.
RotatingTarget
Brande
of Package
Pin 1
Pin 4
dFace
Figure 3. This figure depicts left-to-right (pin 1 to pin 4) direction of target
rotation.
Figure 4. Alternative Polarity Configurations Using Two-Wire Sensing.
The Output Polarity States table provides the permutations of output
voltage relative to I
CC
, given alternative locations for R
SENSE
. Panel A
shows the low-side, V
SENSE(LowSide)
, sensing configuration, and panel B
shows the high-side, V
SENSE(HighSide)
, configuration. As shown in panel
C, V
SENSE(LowSide)
is in phase with I
CC
, and V
SENSE(HighSide)
, is inverted.
ATS685
VCC
GND
V
CC
1
4
ATS685
VCC
GND
V
CC
1
4
V
SENSE(HighSide)
V
SENSE(LowSide)
R
SENSE
R
SENSE
I
CC
I
CC
Output Polarity States
R
SENSE
Location
I
CC
State
V
SENSE
State
High side
(VCC pin side)
High
Low
Low
High
Low side
(GND pin side)
High
High
Low
Low
I
CC
V
SENSE(HighSide)
V+
V
SENSE(LowSide)
V+
I+
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