参数资料
型号: ATSAM3U2EA-CU
厂商: Atmel
文件页数: 21/60页
文件大小: 0K
描述: IC MCU 32BIT 128KB FLSH 144LFBGA
产品培训模块: MCU Product Line Introduction
Cortex®-M3 Introduction and Specific SAM3U Implementation
SAM3U Cortex-M3 Based MCU Introduction
Touch Solutions on the Atmel ARM? Cortex?-M3 Based Flash Microcontrollers
标准包装: 184
系列: SAM3U
核心处理器: ARM? Cortex?-M3
芯体尺寸: 32-位
速度: 96MHz
连通性: EBI/EMI,I²C,MMC,SPI,SSC,UART/USART,USB
外围设备: 欠压检测/复位,DMA,I²S,POR,PWM,WDT
输入/输出数: 96
程序存储器容量: 128KB(128K x 8)
程序存储器类型: 闪存
RAM 容量: 36K x 8
电压 - 电源 (Vcc/Vdd): 1.62 V ~ 1.95 V
数据转换器: A/D 8x10b,8x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 144-LFBGA
包装: 托盘
配用: ATSAM3U-EK-ND - KIT EVAL FOR AT91SAM3U CORTEX
28
6430FS–ATARM–10-Feb-12
SAM3U Series
7.6
DMA Controller
Acting as one Matrix Master
Embeds 4 channels:
– 3 channels with 8 bytes/FIFO for Channel Buffering
– 1 channel with 32 bytes/FIFO for Channel Buffering
Linked List support with Status Write Back operation at End of Transfer
Word, HalfWord, Byte transfer support.
Handles high speed transfer of SPI, SSC and HSMCI (peripheral to memory, memory to
peripheral)
Memory to memory transfer
Can be triggered by PWM and T/C which enables to generate waveforms though the
External Bus Interface
The DMA controller can handle the transfer between peripherals and memory and so receives
the triggers from the peripherals listed below. The hardware interface numbers are also given in
7.7
Peripheral DMA Controller
Handles data transfer between peripherals and memories
Nineteen channels
Two for each USART
Two for the UART
Two for each Two Wire Interface
One for the PWM
One for each Analog-to-digital Converter
Low bus arbitration overhead
– One Master Clock cycle needed for a transfer from memory to peripheral
– Two Master Clock cycles needed for a transfer from peripheral to memory
Next Pointer management for reducing interrupt latency requirement
Table 7-4.
DMA Controller
Instance name
Channel T/R
DMA Channel HW interface
Number
HSMCI
Transmit/Receive
0
SPI
Transmit
1
SPI
Receive
2
SSC
Transmit
3
SSC
Receive
4
PWM Event Line 0
Trigger
5
PWM Event Line 1
Trigger
6
TIO Output of TImer
Counter Channel 0
Trigger
7
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