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参数资料
| 型号： | AUIRF2804STRR |
| 元件分类： | JFETs |
| 英文描述： | 270 A, 40 V, 0.0023 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封装： | ROHS COMPLIANT, D2PAK-3 |
| 文件页数： | 8/15页 |
| 文件大小： | 376K |
| 代理商： | AUIRF2804STRR |
AUIRF2804/S/L
2
www.irf.com
Notes:
Calculated continuous current based on maximum
allowable junction temperature. Package limitation
current is 195A. Note that current limitations arising
from heating of the device leads may occur with
some lead mounting arrangements.
(Refer to AN-1140)
http://www.irf.com/technical-info/appnotes/an-1140.pdf
Repetitive rating; pulse width limited by max. junction
temperature. (See fig. 11).
This value determined from sample failure population ,
starting TJ = 25°C, L=0.24mH, RG = 25, IAS = 75A, VGS =10V.
ISD ≤ 75A, di/dt ≤ 220A/s, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging
time as Coss while VDS is rising from 0 to 80% VDSS.
This value determined from sample failure population. 100%
tested to this value in production
This is applied to D2Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
Max RDS(on) for D2Pak and TO-262 (SMD) devices.
TO-220 device will have an Rth value of 0.45°C/W.
** All AC and DC test condition based on old Package limitation
current = 75A.
S
D
G
S
D
G
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage40
–––
V
ΒVDSS/TJ
Breakdown Voltage Temp. Coefficient
–––
0.031
–––
V/°C
RDS(on) SMD
Static Drain-to-Source On-Resistance
–––
1.5
2.0
RDS(on) TO-220 Static Drain-to-Source On-Resistance
–––
1.8
2.3
VGS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
gfs
Forward Transconductance
130
–––
S
IDSS
Drain-to-Source Leakage Current
–––
20
–––
250
IGSS
Gate-to-Source Forward Leakage
–––
200
Gate-to-Source Reverse Leakage
–––
-200
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Qg
Total Gate Charge
–––
160
240
Qgs
Gate-to-Source Charge
–––
41
62
Qgd
Gate-to-Drain ("Miller") Charge
–––
66
99
td(on)
Turn-On Delay Time
–––13–––
tr
Rise Time
–––
120
–––
td(off)
Turn-Off Delay Time
–––
130
–––
tf
Fall Time
–––
130
–––
LD
Internal Drain Inductance
Between lead,
6mm (0.25in.)
LS
Internal Source Inductance
from package
and center of die contact
Ciss
Input Capacitance
–––
6450
–––
Coss
Output Capacitance
–––
1690
–––
Crss
Reverse Transfer Capacitance
–––
840
–––
Coss
Output Capacitance
–––
5350
–––
Coss
Output Capacitance
–––
1520
–––
Coss eff.
Effective Output Capacitance
–––
2210
–––
Diode Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode)
VSD
Diode Forward Voltage
–––
1.3
V
trr
Reverse Recovery Time
–––
56
84
ns
Qrr
Reverse Recovery Charge
–––
67
100
nC
ton
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
RG = 2.5
ID = 75A **
VDS = 10V, ID = 75A **
VDD = 20V
ID = 75A **
VGS = 20V
VGS = -20V
VDS = 32V
VGS = 10V
f
Conditions
VGS = 0V, VDS = 1.0V, = 1.0MHz
VGS = 10V f
MOSFET symbol
VGS = 0V
VDS = 25V
VGS = 0V, VDS = 32V, = 1.0MHz
Conditions
VGS = 0V, VDS = 0V to 32V
g
= 1.0MHz, See Fig. 5
TJ = 25°C, IF = 75A **, VDD = 20V
di/dt = 100A/s
f
TJ = 25°C, IS = 75A **, VGS = 0V f
showing the
integral reverse
p-n junction diode.
VDS = VGS, ID = 250A
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
Conditions
VGS = 0V, ID = 250A
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 75A f**
VGS = 10V, ID = 75A
f**
m
A
nA
nC
ns
nH
pF
–––
4.5
7.5
270
1080
A
–––
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| AUIRF2804L | 270 A, 40 V, 0.002 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-262AA |
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相关代理商/技术参数 |
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