参数资料
型号: AUIRLR120NTRR
元件分类: JFETs
英文描述: 10 A, 100 V, 0.225 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252AA
封装: ROHS COMPLIANT, PLASTIC, DPAK-3
文件页数: 5/12页
文件大小: 266K
代理商: AUIRLR120NTRR
AUIRLR120N
2
www.irf.com
S
D
G
S
D
G
Notes:
VDD = 25V, starting TJ = 25°C, L = 4.7mH
RG = 25, IAS = 6.0A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
ISD ≤ 6.0A, di/dt ≤ 340A/s, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300s; duty cycle ≤ 2%.
Rθ is measured at TJ approximately 90°C.
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
100
–––
V
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
–––
0.12
–––
V/°C
–––
0.185
–––
0.225
–––
0.265
VGS(th)
Gate Threshold Voltage1.0
–––
2.0
V
gfs
Forward Transconductance
3.1
–––
S
IDSS
Drain-to-Source Leakage Current
–––
25
A
–––
250
IGSS
Gate-to-Source Forward Leakage
–––
100
nA
Gate-to-Source Reverse Leakage
–––
-100
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Qg
Total Gate Charge
–––
20
Qgs
Gate-to-Source Charge
–––
4.6
nC
Qgd
Gate-to-Drain ("Miller") Charge
–––
10
td(on)
Turn-On Delay Time
–––
4.0
–––
tr
Rise Time
–––
35
–––
td(off)
Turn-Off Delay Time
–––
23
–––
ns
tf
Fall Time
–––
22
–––
LD
Internal Drain Inductance
–––
4.5
–––
Between lead,
nH
6mm (0.25in.)
LS
Internal Source Inductance
–––
7.5
–––
from package
and center of die contact
Ciss
Input Capacitance
–––
440
–––
Coss
Output Capacitance
–––
97
–––
Crss
Reverse Transfer Capacitance
–––
50
–––
pF
Diode Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
10
(Body Diode)
A
ISM
Pulsed Source Current
–––
35
(Body Diode)
VSD
Diode Forward Voltage
–––
1.3
V
trr
Reverse Recovery Time
–––
110
160
ns
Qrr
Reverse Recovery Charge
–––
410
620
nC
ton
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
RDS(on)
Static Drain-to-Source On-Resistance
TJ = 25°C, IS = 6.0A, VGS = 0V f
TJ = 25°C, IF = 6.0A
integral reverse
p-n junction diode.
VDS = 80V
Conditions
RD = 8.2
, See Fig. 10 f
VGS = 0V
di/dt = 100A/s
f
Conditions
VGS = 0V, ID = 250A
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 6.0A f
VDS = VGS, ID = 250A
VDS = 100V, VGS = 0V
VDS = 80V, VGS = 0V, TJ = 150°C
MOSFET symbol
showing the
VDS = 25V
= 1.0MHz, See Fig. 5
VGS = 5.0V, See Fig. 6 & 13 f
VDD = 50V
ID = 6.0A
RG = 11
, VGS = 5.0V,
VGS = 5.0V, ID = 6.0A f
VGS = 4.0V, ID = 5.0A f
VDS = 25V, ID = 6.0A
ID = 6.0A
VGS = 16V
VGS = -16V
Conditions
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