参数资料
型号: BD5460GUL-E2
厂商: Rohm Semiconductor
文件页数: 3/7页
文件大小: 0K
描述: IC AMP AUDIO .85W MONO D 9WLCSP
标准包装: 1
类型: D 类
输出类型: 1-通道(单声道)
在某负载时最大输出功率 x 通道数量: 850mW x 1 @ 8 欧姆
电源电压: 2.5 V ~ 5.5 V
特点: 消除爆音,差分输入,短路和热保护,待机
安装类型: 表面贴装
供应商设备封装: VCSP50L1
封装/外壳: 9-WLCSP
包装: 标准包装
产品目录页面: 1371 (CN2011-ZH PDF)
其它名称: BD5460GUL-E2DKR
Micrel, Inc.
SY898535XL
June 2011
3
M9999-062211-B
hbwhelp@micrel.com
Pin Configuration
20-Pin TSSOP (K4-20-1)
Pin Description
Pin Number
Pin Name
Pin Function
1
VEE
Ground.
2
CLK_EN
Single-Ended Input: This TTL/CMOS input disables and enables the Q0-Q3 outputs. It is
internally connected to a 51k pull-up resistor and will default to a logic HIGH state if left
open. When disabled, Q goes LOW and /Q goes HIGH. CLK_EN being synchronous,
outputs will be enabled/disabled following a rising and a falling edge of the input clock. VTH =
is approximately 1.5V.
3
CLK_SEL
Single-Ended Input: This single-ended TTL/CMOS-compatible input selects the input to the
multiplexer. If HIGH, selects XTAL input. If LOW, it selects CLK input. Note that this input is
internally connected to a 51k pull-down resistor and will default to logic LOW state if left
open. VTH = is approximately 1.5V.
4
CLK
Single-Ended Input: This LVCMOS or LVTTL signal is the input signal to the device. It is
internally connected to a 51k pull-down resistor and will default to a logic LOW state if left
open. This input is selected when CLK_SEL is set to logic LOW.
6, 7
XTAL_IN,
XTAL_OUT
Crystal oscillator interface. XTAL_IN is the input. XTAL_OUT is the output.
5, 8, 9
NC
Unused Pins
10, 13, 18
VCC
Positive Power Supply Pins: Bypass with 0.1F||0.01F low ESR capacitors as close to the
VCC pins as possible.
20, 19
17, 16
15, 14
12, 11
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
LVPECL Differential Output Pairs: Differential buffered output copies the selected input
signal. The output swing is typically 800mV. Unused output pairs may be left floating with no
impact on jitter. See “Truth Table” below.
or (408) 955-1690
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