参数资料
型号: BD7844AEFV-E2
厂商: Rohm Semiconductor
文件页数: 3/17页
文件大小: 0K
描述: IC LED DISPLAY DVR 5V 28-HTSSOP
标准包装: 1
拓扑: 开路漏极,PWM
输出数: 16
内部驱动器:
类型 - 主要: 通用
频率: 2MHz
电源电压: 4.5 V ~ 5.5 V
输出电压: 20V
安装类型: 表面贴装
封装/外壳: 28-VSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-HTSSOP-B
包装: 标准包装
工作温度: -40°C ~ 85°C
其它名称: BD7844AEFV-E2DKR
BD7844AEFV
● Logic signal timing specification (Unless otherwise specified, Ta=25 ℃ , VDD=5.0V, GND=0V)
Datasheet
Parameter Symbol
Limits
Min. Typ. Max.
Unit
Conditions
and START condition
SCL Clock frequency 1
SCL Clock frequency 2
Bus free time between a STOP
*1
Hold time (repeated) START condition.
After this period, the first clock is generated
Set-up time for a repeated START condition
Set-up time for STOP condition
SDA Data hold time
f SCL1
f SCL2
t BUF
t HD;STA
t SU;STA
t SU;STO
t HD;DAT
-
-
500
260
260
260
0
-
-
-
-
-
-
-
1.0
2.0
-
-
-
-
-
MHz
MHz
ns
ns
ns
ns
ns
I2CSEL=H : SDA=I/O
I2CSEL =L : SDA=input
SDA data valid acknowledge time
*2
t VD;ACK
-
-
450
ns
I2CSEL =H : SDA=I/O
SDA data valid time
*3
t VD;DAT
-
-
450
ns
I2CSEL =H : SDA=I/O
SDA Data set-up time
t SU;DAT
50
-
-
ns
SCL clock low period1
SCL clock high period1
SCL, SDA fall time1
SCL, SDA rise time1
SCL clock low period2
SCL clock high period2
SCL, SDA fall time2
SCL, SDA rise time2
Pulse width of spikes which must be
suppressed by SCL, SDA filter
Reset pulse width *4
t LOW1
t HIGH1
t f1
t r1
t LOW2
t HIGH2
t f2
t r2
t SP
t W
500
260
-
-
230
250
-
-
-
-
-
-
-
-
-
-
-
-
50
10
-
-
120
120
-
-
50
50
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
I2CSEL =H : SDA=I/O
I2CSEL =H : SDA=I/O
I2CSEL =H : SDA=I/O
I2CSEL =H : SDA=I/O
I2CSEL =L : SDA=input
I2CSEL =L : SDA=input
I2CSEL =L : SDA=input
I2CSEL =L : SDA=input
*1)
*2)
*3)
*4)
Keep more than 100μs Bus free time after power on.
tVD;ACK :Time for acknowledge signal from SCL=’L’ to SDA(output)=’L’
tVD;DAT :Time for from SCL=’L’ to SDA valid data output
Miss-operation is likely to happen with reset in accessing I 2 C bus.
www.rohm.com
? 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
3/14
TSZ02201-0G3G0CZ00310-1-2
15.Oct.2012 Rev.001
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