参数资料
| 型号： | BD8643FV-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 9/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 3A 20SSOP |
| 标准包装： | 2,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1 V ~ 12.6 V |
| 输入电压： | 4.5 V ~ 18 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 100kHz ~ 600kHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 是 |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-LSSOP（0.240"，6.10mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-SSOP-B |
BD8643FV
3 Selection of inductor (L)
Please select the value of the inductor according to the following expressions.
Technical Note
L ?
(V IN ? V OUT ) ? V OUT
⊿ I L ? V IN ? f
[H]
I L
I L
( ⊿ IL: Output ripple current , f: Switching frequency)
Fig.18 Current of output ripple
※ Please have and select an enough margin so that the current peak should not exceed the ratings current value of the inductor.
4 Selection of input capacitor (Cin)
Please use a low ESR input capacitor which can be used with high voltage and ripple current to prevent a big transition
voltage.
※ Please put on the input capacitor near side by VIN-PGND.
5 Selection of diode
Please have and set the margin enough to the current rating of the diode for the maximum load current.
Moreover, please similarly have and set the margin enough to a ratings reverse-voltage for the maximum input voltage.
FB
FC
R1
C1
Fig.19 Phase amends part external circuit chart
6 OFFLATCH time setting method
If it continues abnormal state, BD8643FV output become low voltage and state is fixed.
In this case, the OFFLATCH time can be set by connecting capacitor between PSET and GND. Please select the value of
OFFLATCH time according to the following expression. Please set OFFLATCH time in 200μsec ～ 5msec.
T TM =
C PSET
I PSET (5μA typ)
[sec] ??? (11)
To release the off latch state, EN or VIN terminal voltage should be changed to low level once time.
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? 2010 ROHM Co., Ltd. All rights reserved.
9/13
2010.09 - Rev.A
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相关代理商/技术参数 |
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