参数资料
| 型号： | BD91361MUV-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 11/23页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 20VQFN |
| 特色产品： | BD91x Series Step-Down Regulators |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 3.3 V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 20-VQFN |
| 其它名称： | BD91361MUV-E2DKR |
BD91361MUV
Datasheet
● About Setting the Output Voltage
Output voltage shifts step by step as often as bit setting to control the overshoot/undershoot that happen when changing
the setting value of output voltage. From the bit switching until output voltage reach to setting value, 8 steps(max) delay will
occur.
VID<2:0>
VOUT
(0,1)
0.72V
(1,1)
tVID (max)=0.04ms
0.96V
ⅰ ) Switching 2 bit synchronously
VID<1>
VID<0>
Count STOP
VOUT
5μs(max)
ⅲ ) Switching the bit during counting
<1>
<0>
Count STOP
VOUT
About 10μs from bit switching
About 10μs from bit switching
ⅱ ) Switching 2 bit with the time lag
VID<1>
VID<0>
Count STOP
VOUT
About 10μs from switching the last bit
Fig.26 Timing chart of setting the output voltage
It is possible to set output voltage, shown the diagram 1 below, by setting VID<0> to <1> 0 or 1.
VID<1:0> terminal is set to VID<1:0>=(0,0) originally by the pull down resistor with high impedance inside IC.
By pulling up/ pulling down about 10k Ω , the original value is changeable optionally.
Diagram 1. Table of output voltage setting
VID<1>
0
0
1
1
VID<0>
0
1
0
1
V OUT
V OUT
0.9*V OUT
1.1*V OUT
1.2*V OUT
*After 10μs(max) from the bit change, V OUT change starts.
*Requiring time for one step (10% shift of V OUT ) of V OUT is 10μs(max).
*From the bit switching until output voltage reach to setting value, t VID (max)=0.04ms delay will occur.
www.rohm.com
?2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
11/21
TSZ02201-0J3J0AJ00200-1-2
02.MAR.2012 Rev.001
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