参数资料
| 型号： | BD9306AFVM-TR |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 7/15页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST PWM 8-MSOP |
| 标准包装： | 1 |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 800kHz |
| 占空比： | 83% |
| 电源电压： | 4.2 V ~ 18 V |
| 降压： | 无 |
| 升压： | 是 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-VSSOP，8-MSOP（0.110"，2.80mm 宽） |
| 包装： | 标准包装 |
| 其它名称： | BD9306AFVM-DKR BD9306AFVM-DKR-ND BD9306AFVMDKR |
BD9306AFVM, BD9305AFVM
Technical Note
? Block Operation
? Error amplifier (Err)
It is a circuit that compares the standard voltage of 1.25V (TYP) and the feedback voltage of output voltage.
The switching Duty is determined by the COMP terminal voltage of this comparison result.
? Oscillator (OSC)
It is a block, in which the switching frequency is determined by RT and CT, and the triangular wave is determined by RT
and CT.
? PWM
The Duty is determined by comparing the output of Error amplifier and the angular wave of Oscillator.
The switching Duty of BD9306AFVM is limited by the maximum duty ratio that is determined by the internal part, and will
not be up to 100%.
? DRV
The gate of the power FET that is connected to the outside is driven by the switching Duty determined by PWM.
? VREF
It is a block that outputs the internal standard voltage of 2.5V (TYP).
The internal circuit is entirely the bearer of this standard voltage that is turned ON / OFF by the ENB terminal.
? Protection circuits (UVLO / TSD)
UVLO (low-voltage Lock Out circuit) shuts down the circuits when the voltage is below 3.5V (MIN).
Moreover, TSD (temperature protection circuit) shuts down the IC when the temperature reaches 175 ℃ (TYP).
? Soft Start Circuit
The Soft Start Circuit limits the current at the time of startup while ramping up the output voltage slowly.
The overshoot of output voltage and the plunging current can be prevented.
? Timer Latch
It is an output short protection circuit that detects the output short if the output of error amplifier (COMP voltage) is more
than 1.7V (TYP). If the COMP voltage becomes more than 1.7V, the counter begins to operate, the LATCH is locked when
the counter counts to 2200, and the GD output shuts down. ( ＊ the frequency of counter is determined by RT and CT.)
Once the LATCH is locked, the GD output does not operate until it is restarted by ENB or VCC. If the output short is
removed while the Timer latch is counting, the counter is reset.
? Selecting Application Components
(1) Setting the output L constant (Step Down DC/DC)
The inductance L to use for output is decided by the rated current ILR and input current maximum value IOMAX of the
inductance.
IL
I OMAX + ? I L should not
2
reach the rated value level
ILR
VCC
I OMAX mean
I L
Vo
current
L
Fig.22 Coil Current Waveform (Step Down DC/DC)
t
Co
Fig.23 Output Application Circuit (Step Down DC/DC)
Adjust so that I OMAX + Δ I L / 2 does not reach the rated current value I LR .
At this time, ? I L can be obtained by the following equation.
Δ I L =
1 Vo 1
X (Vcc-Vo)X X
L Vcc f
[A]
Set with sufficient margin because the inductance L value may have the dispersion of ± 30%.
If the coil current exceeds the rating current I LR of the coil, it may damage the IC internal element.
www.rohm.com
? 2009 ROHM Co., Ltd. All rights reserved.
7/14
2009.05 - Rev.A
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