参数资料
| 型号： | BH2226FV-FE2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT 8-CHAN SSOP-B16 |
| 标准包装： | 1 |
| 设置时间： | 100µs |
| 位数： | 8 |
| 数据接口： | 串行 |
| 转换器数目： | 8 |
| 电压电源： | 单电源 |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-SSOPB |
| 包装： | 标准包装 |
| 输出数目和类型： | 8 电压，单极 |
| 采样率（每秒）： | * |
| 产品目录页面： | 1375 (CN2011-ZH PDF) |
| 其它名称： | BH2226FV-FE2DKR |
BH2226FV,BH2226F
Technical Note
6/9
www.rohm.com
2009.07 - Rev.B
2009 ROHM Co., Ltd. All rights reserved.
·Command Transmission Procedures
Carry out the following after power on and just after external reset:
(1)
Power Down Release (2) I/O D/A Select (3) I/O Status Set
Note: When power is started, the power on reset is activated and the internal register initialized.
However, as shown in the
figure above, in area (a), if CSB cannot be made High and noise is introduced in the control line an error may occur when
setting during the rising CSB signal.
In such a case, set the external RESETB terminal to Low and reset when CSB = High.
·Parallel - Serial Conversion
Parallel data {DA[8:1]} is taken in at the first CSB falling edge after setting the parallel serial command.
The data is then outputted in synch with the falling edge of the CLK in the next CSB = Low area, and output from 4CLK.
However, please note that the SCLK falling edge that occurs from CSB fall to the first SCLK rising edge is not counted.
·Serial - Parallel Conversion
DI serial data is taken in at the rising edge of the CLK.
The data is then output from the DA[8:1] terminal just after the CSB rising edge.
During that time the SO terminal output becomes undetermined (just previous address setting + data output).
·D/A Converter Output Setting (Fig. 7)
DI serial data is taken in at the rising edge of the clock.
The D/A converter output is output from the DA[8:1] terminal just after the rising edge of the CSB.
During that time, the SO terminal output becomes undetermined (just previous address setting + data output).
Fig.7
Fig.6
Fig.5
Fig.8
Power down release
I/O DAC select
I/O status setting
Arbitrary setting
Parallel data taking in
PS conversion command
Parallel data output
DAC output
DA1 output
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BH2226FV-F-E2 | 制造商:ROHM Semiconductor 功能描述: |
| BH2226GV-E2 | 制造商:ROHM Semiconductor 功能描述: |
| BH2227FV | 制造商:ROHM 制造商全称:Rohm 功能描述:Standard 8bit 4ch-E6ch Type D/A Converters |
| BH2227FV_09 | 制造商:ROHM 制造商全称:Rohm 功能描述:Standard 8bit 4ch-E6ch Type D/A Converters |
| BH2227FV_11 | 制造商:ROHM 制造商全称:Rohm 功能描述:Standard 8bit 4ch?6ch Type D/A Converters |
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