参数资料
型号: BH76362FV-E2
厂商: Rohm Semiconductor
文件页数: 5/15页
文件大小: 0K
描述: IC VIDEO SIGNAL SWITCHERS 16SSOP
标准包装: 1
功能: 视频开关
电路: 1 x 6:1
电压电源: 单电源
电压 - 电源,单路/双路(±): 2.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-SSOPB
包装: 标准包装
产品目录页面: 1375 (CN2011-ZH PDF)
其它名称: BH76362FV-E2DKR
Micrel Inc.
MIC4555
September 2011
13
M9999-092311-B
Application Information
The MIC4555 is a digital level shifter with a 50mA LDO
for SIM card interfaces. There are three high-speed level
shifters that can convert input voltages from the
controller and then level shift it to either 1.8V or 3.0V for
the SIM card. A voltage select pin (VSEL) selects the
output voltage. The MIC4555 also has a 50mA LDO that
can be used to power the SIM card.
As the MIC4555 is a CMOS device, the ground current is
typically <100A over the load range, the power
dissipation contributed by the ground current is < 1% and
may be ignored for this particular calculation.
Example:
VBAT = 3.6V
Input Capacitor
VCC = 1.8V
An input capacitor of 1F is required from the VBAT to
ground to provide stability. Low-ESR ceramic capacitors
provide optimal performance with minimum board area.
Additional high-frequency capacitors, such as small
valued NPO dielectric type capacitors, help filter out
high-frequency noise and are good practice in any RF-
based circuit. X5R or X7R dielectrics are recommended
for the input capacitor. Y5V dielectrics lose most of their
capacitance over temperature and are therefore, not
recommended.
IOUT = 50mA
PD = (3.6V – 1.8V)50mA
PD = 0.09W
To
determine
the
maximum
operating
ambient
temperature of the package, use the junction to ambient
thermal resistance of the device and the following basic
equation:
Output Capacitor
=
JA
A
J(max)
D(max)
T
P
θ
The MIC4555 requires an output capacitor of 1F or
greater for VCC to maintain stability. The design is
optimized for use with low-ESR ceramic-chip capacitors.
High-ESR capacitors are not recommended because
they may cause high-frequency oscillation. The output
capacitor can be increased, but performance has been
optimized for a 1F ceramic output capacitor and does
not improve significantly with larger capacitance.
TJ(max) = 125°C, the maximum junction temperature of the
die, and θJA thermal resistance = 59°C/W for the Thin
MLF
package.
Substituting PD for PD(max) and solving for the ambient
operating temperature will give the maximum operating
conditions for the regulator circuit.
X7R/X5R
dielectric
type
ceramic
capacitors
are
recommended
because
of
their
temperature
performance. X7R-type capacitors change capacitance
by 15% over their operating temperature range and are
the most stable type of ceramic capacitors. Z5U and
Y5V dielectric capacitors change value by as much as
50% and 60%, respectively, over their operating
temperature ranges. To use a ceramic-chip capacitor
with Y5V dielectric, the value must be much higher than
an X7R ceramic capacitor to ensure the same minimum
capacitance over the equivalent operating temperature
range.
The maximum power dissipation must not be exceeded
for proper operation.
For example, when operating the MIC4555YMT at an
input voltage of 3.6V and 50mA load with a minimum
footprint layout, the maximum ambient operating
temperature TA can be determined as follows:
0.09W = (125°C – TA)/(59°C/W)
TA = 119.69°C
Thermal Considerations
The MIC4555 is designed to provide output current up to
50mA. The maximum ambient operating temperature
can be calculated based upon the output current and the
voltage drop across the part. For example if the input
voltage (VBAT) is 3.6V and the output voltage (VCC) is
1.8V at 50mA, the power dissipation of the regulator
circuit can be determined using the equation:
Therefore, the maximum ambient operating temperature
of 119.69°C is allowed in a 3mm x 3mm thin MLF
package. For a full discussion of heat sinking and
thermal effects on voltage regulators, refer to the
“Regulator Thermals” section of Micrel’s Designing with
Low
Dropout
Voltage
Regulators
handbook. This
information can be found on Micrel's website at:
PD = (VBAT – VCC) I OUT + VBAT IGND
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