参数资料
| 型号： | BR24L32F-WE2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 32/41页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 32KBIT 400KHZ 8SOP |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 32K (4K x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-SOP |
| 包装： | 标准包装 |
| 产品目录页面： | 1379 (CN2011-ZH PDF) |
| 其它名称： | BR24L32F-WE2DKR |
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BR24L □□ -W Series,BR24S □□□ -W Series
Technical Note
● Software reset
Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset
has several kinds, and 3 kids of them are shown in the figure below. (Refer to Fig.45(a), Fig.45(b), Fig.45(c).) In dummy
clock input area, release the SDA bus ('H' by pull up). In dummy clock area, ACK output and read data '0' (both 'L' level) may
be output from EEPROM, therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to
instantaneous power failure of system power source or influence upon devices.
Dummy clock×14
Start×2
SCL
1
2
13
14
Normal command
SDA
Normal command
Fig.45-(a) The case of 14 Dummy clock + START + START+ command input
Start
Dummy clock×9
Start
SCL
1
2
8
9
Normal command
SDA
Normal command
Fig.45-(b) The case of START+9 Dummy clock + START + command input
Start×9
SCL
1
2
3
7
8
9
Normal command
SDA
Normal command
* Start command from START input.
Fig.45-(c) START × 9 + command input
● Acknowledge polling
During internal write, all input commands are ignored, therefore ACK is not sent back. During internal automatic write
execution after write cycle input, next command (slave address) is sent, and if the first ACK signal sends back 'L', then it
means end of write action, while if it sends back 'H', it means now in writing. By use of acknowledge polling, next command
can be executed without waiting for tWR = 5ms.
When to write continuously, R/W = 0, when to carry out current read cycle after write, slave address R/W = 1 is sent, and if
ACK signal sends back 'L', then execute word address input and data so forth.
First write command
During internal write,
ACK = HIGH is sent back.
S
T
A
R
T
Write command
S
T
O
P
S
T
A
R
T
Slave
address
A
C
K
H
S
T
A Slave
R address
T
A
C
K
H
…
t WR
Second write command
…
S
T Slave
A
R address
T
A
C
K
H
S
T Slave
A
R address
T
A
C
K
L
Word
address
A
C
K
L
Data
A
C
K
L
S
T
O
P
t WR
After completion of internal
write, ACK=LOW is sent back,
so input next word address and
data in succession.
Fig.46 Case to continuously write by acknowledge polling
www.rohm.com
? 2009 ROHM Co., Ltd. All rights reserved.
32/40
2009.09 - Rev.D
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BR24L32F-WTR | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Series EEPROMs I2C BUS |
| BR24L32NUX-WE2 | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Series EEPROMs I2C BUS |
| BR24L32NUX-WTR | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Series EEPROMs I2C BUS |
| BR24L32-W | 功能描述:IC EEPROM 32KBIT 400KHZ 8DIP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:2,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 异步 存储容量:256K (32K x 8) 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:28-TSSOP（0.465"，11.8mm 宽） 供应商设备封装:28-TSOP 包装:带卷 (TR) 其它名称:71V256SA15PZGI8 |
| BR24L64 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Serial 2 Wire Interface (I2C BUS Type) |
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