参数资料
| 型号： | BR24L64-W |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 14/41页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 64KBIT 400KHZ 8DIP |
| 标准包装： | 50 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 64K (8K x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-DIP |
| 包装： | 管件 |
| 产品目录页面： | 1379 (CN2011-ZH PDF) |
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BR24L □□ -W Series,BR24S □□□ -W Series
Technical Note
● Software reset
Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset
has several kinds, and 3 kinds of them are shown in the figure below. (Refer to Fig.48(a), Fig.48(b), and Fig.48(c).) In
dummy clock input area, release the SDA bus ('H' by pull up). In dummy clock area, ACK output and read data '0' (both 'L'
level) may be output from EEPROM, therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading
to instantaneous power failure of system power source or influence upon devices.
Dummy clock×14
Start×2
SCL
1
2
13
14
Normal command
SDA
Normal command
Fig.48-(a) The case of dummy clock +START+START+ command input
Start
Dummy clock×9
Start
SCL
1
2
8
9
Normal command
SDA
Normal command
Fig.48-(b) The case of START +9 dummy clocks +START+ command input
Start×9
SCL
1
2
3
7
8
9
Normal command
SDA
*
Normal command
Start command from START input.
Fig.48-(c) START×9+ command input
● Acknowledge polling
During internal write execution, all input commands are ignored, therefore ACK is not sent back. During internal automatic
write execution after write cycle input, next command (slave address) is sent, and if the first ACK signal sends back 'L', then
it means end of write action, while if it sends back 'H', it means now in writing. By use of acknowledge polling, next command
can be executed without waiting for tWR = 5ms.
When to write continuously, R/W = 0, when to carry out current read cycle after write, slave address R/W = 1 is sent, and if
ACK signal sends back 'L', then execute word address input and data output and so forth.
During internal write,
First write command
ACK = HIGH is sent back.
S
T
A
R
T
Write command
S
T
O
P
S
T Slave
A
R address
T
A
C
K
H
S
T Slave
A
R address
T
A
C
K
H
t WR
Second write command
…
S
T Slave
A
R address
T
A
C
K
H
S
T Slave
A
R address
T
A
C Word
K address
L
A
C
K
L
Data
A
C
K
L
S
T
O
P
t WR
After completion of internal write,
ACK=LOW is sent back, so input next
word address and data in succession.
Fig.49 Case to continuously write by acknowledge polling
www.rohm.com
? 2009 ROHM Co., Ltd. All rights reserved.
14/40
2009.09 - Rev.D
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相关代理商/技术参数 |
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|---|---|
| BR24L64-W_1 | 制造商:ROHM 制造商全称:Rohm 功能描述:8k】8 bit electrically erasable PROM |
| BR24L70SP | 制造商:Eaton Corporation 功能描述:1 Ph/BR Loadcenter 70A MLO 2/4 Cir Al Bus Surface Cover |
| BR24LXX-W | 制造商:ROHM 制造商全称:Rohm 功能描述:I2C BUS Serial EEPROMs |
| BR24S01FJ-WE2 | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Series EEPROMs I2C BUS |
| BR24S01FJ-WTR | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Series EEPROMs I2C BUS |
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