参数资料
型号: BR93L46FV-WE2
厂商: Rohm Semiconductor
文件页数: 5/41页
文件大小: 0K
描述: IC EEPROM 1KBIT 2MHZ 8SSOP
标准包装: 1
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 1K (64 x 16)
速度: 2MHz
接口: Microwire 3 线串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-LSSOP(0.173",4.40mm 宽)
供应商设备封装: 8-SSOPB
包装: 标准包装
产品目录页面: 1380 (CN2011-ZH PDF)
其它名称: BR93L46FV-WE2DKR
BR93L -W Series, 93A □□ -WM Series, BR93H □□ -WC Series
● Action timing characteristics
(BR93L □□ -W, Ta=-40 ~ +85 ℃ , VCC=2.5 ~ 5.5V, BR93A □□ -WM, Ta=-40 ~ +105 ℃ , VCC=2.5 ~ 5.5V)
Technical Note
Parameter Symbol
2.5V ≦ VCC ≦ 5.5V
Min. Typ. Max.
Unit
SK frequency
SK “H” time
SK “L” time
CS “L” time
CS setup time
DI setup time
CS hold time
DI hold time
Data “1” output delay time
Data “0” output delay time
Time from CS to output establishment
Time from CS to High-Z
Write cycle time
(BR93L □□ -W, Ta=-40 ~ +85 ℃ , VCC=1.8 ~ 2.5V)
f SK
t SKH
t SKL
t CS
t CSS
t DIS
t CSH
t DIH
t PD1
t PD0
t SV
t DF
t E/W
- - 2 MHz
230 - - ns
230 - - ns
200 - - ns
50 - - ns
100 - - ns
0 - - ns
100 - - ns
- - 200 ns
- - 200 ns
- - 150 ns
- - 150 ns
- - 5 ms
Parameter
SK frequency
SK “H” time
SK “L” time
CS “L” time
CS setup time
DI setup time
CS hold time
DI hold time
Data “1” output delay time
Data “0” output delay time
Time from CS to output establishment
Time from CS to High-Z
Write cycle time
Symbol
f SK
t SKH
t SKL
t CS
t CSS
t DIS
t CSH
t DIH
t PD1
t PD0
t SV
t DF
t E/W
Min.
-
0.8
0.8
1
200
100
0
100
-
-
-
-
-
1.8V ≦ VCC ≦ 2.5V
Typ. Max.
- 500
- -
- -
- -
- -
- -
- -
- -
- 0.7
- 0.7
- 0.7
- 200
- 5
Unit
kHz
us
us
us
ns
ns
ns
ns
us
us
us
ns
ms
● Sync data input / output timing
CS
tCSS
tSKH
tSKL
tCSH
SK
DI
tDIS
t PD0
tDI H
tPD1
DO(READ)
tDF
DO(WRITE)
STATUS VALID
Fig.1 Sync data input / output timing
○ Data is taken by DI sync with the rise of SK.
At read action, data is output from DO in sync with the rise of SK.
○ The status signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area
DO where CS is “H”, and valid until the next command start bit is input. And, while CS is “L”, DO becomes High-Z.
○ After completion of each mode execution, set CS “L” once for internal circuit reset, and execute the following action mode.
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? 2011 ROHM Co., Ltd. All rights reserved.
5/40
2011.09 - Rev.G
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