参数资料
型号: BT498AKHF240
厂商: CONEXANT SYSTEMS
元件分类: 显示控制器
英文描述: 1920 X 1200 PIXELS PALETTE-DAC DSPL CTLR, PQFP208
封装: PLASTIC, MQFP-208
文件页数: 71/141页
文件大小: 1512K
代理商: BT498AKHF240
L498A_B
1.0 Circuit Description
240 MHz Monolithic CMOS Triple 1K x 8 RAMDAC
1.7 Frame Buffer Interface
L498A_B
Conexant
1-25
Preliminary Information/Conexant Proprietary and Confidential
Figure 1-12. 4/2:1 Double-Buffered Pixel Format
NOTE(S):
This mode is valid for pixel clock Fp
≤ 160 MHz. LD frequency = Fp/2 MHz. Not valid for the Bt497A.
Pixel Clock
LD
PORT B
PB[63:56]
PB[55:48]
PB[47:40]
PB[39:32]
PB[31:24]
P B[23:16]
PB[15:8]
PB[7:0]
PORT A
PA[63:56]
PA[55:48]
PA[47:40]
PA[39:32]
PA[31:24]
PA[23:16]
PA[15:8]
PA[7:0]
x3
blue3
x2
blue2
x1
blue1
x0
blue0
green3
red3
green2
red2
green1
red1
green0
red0
green3
red3
green2
red2
green1
red1
green0
red0
blue3
blue2
blue1
blue0
x3
x2
x1
x0
x7
blue7
x6
blue6
x5
blue5
x4
blue4
blue7
blue6
blue5
blue4
x7
x6
x5
x4
green7
red7
green6
red6
green5
red5
green4
red4
green7
red7
green6
red6
green5
red5
green4
red4
green11
red11
green10
red10
green9
red9
green8
red8
x11
blue11
x10
blue10
x9
blue9
x8
blue8
green11
red11
green10
red10
green9
red9
green8
red8
blue11
blue10
blue9
blue8
x11
x10
x9
x8
0, 1, 2, 3
4, 5, 6, 7
8, 9, 10, 11
7
6
5
4
3
2
1
0
Port A Pixels
Port B Pixels
Serialized 24-Bit
Pixels plus X Bits
497-8_013
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