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参数资料
| 型号： | BU-63825D3-200 |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70 |
| 封装： | CERAMIC, DIP-70 |
| 文件页数： | 11/48页 |
| 文件大小： | 405K |
| 代理商： | BU-63825D3-200 |
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19
Data Device Corporation
www.ddc-web.com
BU-63825
C-02/06-0
Upon completion of the message, provided that the message
was valid and Subaddress Double Buffering is enabled, the BU-
63825 will automatically switch the “active” and “inactive” blocks
for the respective subaddress. The Sp’ACE II accomplishes this
by toggling bit 5 of the subaddress’s Lookup Table Pointer and
rewriting the pointer. As a result, the most recent valid block of
received Data Words will always be readily accessible to the host
processor.
As a means of ensuring data consistency, the host processor is
able to reliably access the most recent valid, received Data Word
block by performing the following sequence:
(1) Disable the double buffering for the respective subaddress by
the Subaddress Control Word. That is, temporarily switch the
subaddress’s memory management scheme to the Single
Message mode.
(2) Read the current value of the receive (or broadcast) subad-
dress’s Lookup Table pointer. This points to the current “active”
Data Word block. By inverting bit 5 of this pointer value, it is pos-
sible to locate the start of the “inactive” Data Word block. This
block will contain the Data Words received during the most
recent valid message to the subaddress.
(3) Read out the words from the “inactive” (most recent) Data
Word Block.
(4) Re-enable the Double Buffering mode for the respective sub-
address by the Subaddress Control Word.
RT INTERRUPTS
As in BC mode, the BU-63825 RT provides many maskable
interrupts. RT interrupt conditions include End of (every)
Message, Message Error, Selected Subaddress (Subaddress
Control Word) Interrupt, Circular Buffer Rollover, Selected Mode
Code Interrupt, and Stack Rollover.
DESCRIPTOR STACK
At the beginning and end of each message, the BU-63825 RT
stores a four-word message descriptor in the active area stack.
The RT stack size is programmable, with choices of 256, 512,
1024, and 2048 words. FIGURES 5, 6, and 7 show the four
words: Block Status Word, Time Tag Word, Data Block Pointer,
and the 1553 received Command Word. The RT Block Status
Word includes indications of message in-progress or message
complete, bus channel, RT-to-RT transfer and RT-to-RT transfer
errors, message format error, loop test (self-test) failure, circular
buffer rollover, illegal command, and other error conditions.
TABLE 24 shows the bit mapping of the RT Block Status Word.
As in BC mode, the Time Tag Word stores the current contents
of the BU-63825’s read/writable Time Tag Register. The resolu-
tion of the Time Tag Register is programmable from among 2, 4,
8, 16, 32, and 64 s/LSB. Also, incrementing of the Time Tag
counter may be from an external clock source or via software
command.
The Sp’ACE II stores the contents of the accessed Lookup Table
location for the current message, indicating the starting location
of the Data Word block, as the Data Block Pointer. This serves
as a convenience in locating stored message data blocks. The
FIGURE 7. RT MEMORY MANAGEMENT: SUBADDRESS DOUBLE BUFFERING MODE
15
13
0
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND
WORD
CONFIGURATION
REGISTER
STACK
POINTERS
DESCRIPTOR
STACK
CURRENT
AREA B/A
DATA
BLOCKS
DATA
BLOCK 1
DATA
BLOCK 0
X..X 0 YYYYY
X..X 1 YYYYY
RECEIVE DOUBLE
BUFFER ENABLE
SUBADDRESS
CONTROL WORD
MSB
DATA BLOCK POINTER
LOOK-UP
TABLES
#1
相关PDF资料 |
PDF描述 |
|---|---|
| BU-63825G1-300 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDSO70 |
| BU-63925D6-191 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70 |
| BU-63925F0-190 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| BU-63925G3-190 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDSO70 |
| BU-64703F8-300 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
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