参数资料
型号: BU-64703B3-200
厂商: DATA DEVICE CORP
元件分类: 微控制器/微处理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CBGA80
封装: CERAMIC, BGA-80
文件页数: 7/48页
文件大小: 405K
代理商: BU-64703B3-200
15
Data Device Corporation
www.ddc-web.com
BU-64703
D-03/06-0
t1
RT - RT response timeout for transmitting RT.
ALL
17.5
s
t2
Mid-parity crossing of received command word delay to
L-BRO, T/R Bit, SA4-SA0, and WC/MC valid
ALL
s
t3
Mid-parity crossing of received command word delay to
falling edge of INCMD
ALL
s
t4
Mid-Parity crossing of received command word delay to
MSG_ERR and HS_FAIL rising
ALL
s
t5
ILLEGAL, SRV_RQST, SSFLAG, BUSY input access time from
SA4-SA0, L-BRO, T/R, and CWC/MC valid
ALL
ns
t6
L-BRO, T/R, SA4-0, and WC/MC4-0 setup time prior to INCMD low
ALL
500
ns
t7
ILLEGAL, SRV_RQST, SSFLAG, BUSY hold time following
falling edge of INCMD
ALL
300
ns
t8
Mid-Sync crossing of status word to WC/CWC valid data of 1Fh
t9
Mid-Sync crossing of status word to DTREQ falling edge
t10
Mid-Sync crossing of Status response to RT_FAIL rising
ALL
s
t11
Duration of WC/CWC value of 1Fh
t12
CWC valid following falling edge of DTREQ
ALL
ns
t13
Mid-Sync crossing of received data word to DTREQ falling edge
20 MHz
s
REF
DESCRIPTION
CLOCK
FREQUENCY
VALUE
UNITS
TABLE FOR FIGURE 7. RT-RT TRANSMIT COMMAND TIMING
t14
Mid-Sync crossing of last received data word for CWC to transition to
WC
MIN
TYP
MAX
18.5
19.5
1.5
2
1.5
400
1.5
30
1.75
16 MHz
s
1.81
12 MHz
s
1.92
10 MHz
s
2
t15
Mid-Parity crossing of status word to INCMD rising
ALL
s
3
20 MHz
s
1.55
16 MHz
s
1.56
12 MHz
s
1.59
10 MHz
s
1.6
20 MHz
s
6.75
16 MHz
s
6.81
12 MHz
s
6.92
10 MHz
s
7
20 MHz
ns
200
16 MHz
ns
250
12 MHz
ns
333
10 MHz
ns
400
ALL
s
6.5
FIGURE 7. RT - RT TRANSMIT TIMING
INCMD
DTREQ
DTGRT
DTACK
GBR
MEMWR
MEMOE
D15-D0
RT_FAIL
MSG_ERR
HS_FAIL
SINGLE
WORD
READ
DATA WORD
#1
SINGLE
WORD
READ
DATA WORD
#2
t15
t9
t10
t4
t1
ILLEGAL, SRV_RQST
SSFLAG, BUSY
VALID
t7
t5
t13
t14
L-BRO, T/R, SA4-SA0
WC/MC/CWC
t2
t3
PREVIOUS MSG
cwc = 1
t6
t11
t12
WC
CWC = 0
1F
t8
1553 BUS
RX COMMAND
STATUS
TX COMMAND
DATA #1
MID-PARITY
MID-SYNC
DATA #2
STATUS
(Refer to FIGURE 12)
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