参数资料
型号: C16X
厂商: SIEMENS AG
元件分类: 8位微控制器
英文描述: 8-Bit Microcontroller(8位微控制器)
中文描述: 8位微控制器(8位微控制器)
文件页数: 6/40页
文件大小: 460K
代理商: C16X
Using the
SSC (SPI) Interface in a Multimaster System
Semiconductor Group
6 of 40
AP1632 06.96
3.3
Prior to initialization it is required to disable the SSC by clearing the configuration register
SSCCON. Then the pins used by the SSC (MRST, MTSR and SCLK) have to be
configured whether to output or to input depending on the desired mode of the SSC. In
master mode, SCLK providing shift clock for all SSC and the master transmit pin MTSR
are outputs while the master receive pin has to be set to input (Port3 direction register
DP3). In slave mode, all three port pins are configured to input (SCLK receives shift clock
from the current master, MTSR is the slave receive line and MRST is only switched to
output when the slave transmits data to the master to avoid collisions on this line). In
order to use these alternate functions of Port3, the bits of the output latch are to be set to
‘1’ because it is ANDed with the alternate function.
n the demo software, the SSC is configured to a data width of 16 bit (SSCBM), transmit
and receive MSB first (SSCHB), shift transmit data on the leading edge (SSCPH), idle
clock line low (SSCPO) and ignoring all errors (SSCTEN,SSCREN,SSCPEN,SSCBEN),
resulting in a initialization value of 0x805F in slave mode or 0xC05F in master mode
(fig.3). Configuring and enabling the SSC is done by simply writing this value into
SSCCON and takes only one instruction.
For the code listing of the SSC initialization file,
INIT_SSC.C
, see 4.1.3.
SSC initialization
Figure 4:
Configuring the SSC in the demo software
SSC
EN=0
SSC
MS
_
SSC
AREN
SSC
BEN
SSC
PEN
SSC
REN
SSC
TEN
_
SSC
PO
SSC
PH
SSC
HB
SSCBM
1
0/1
0
0
0
0
0
0
0
1
0
1
1
1
1
1
ENABLE SSC (previous state SSCEN = 0 !)
init SSC to MASTER (1) or SLAVE (0)
DISABLE SSC error interrupts
16 bit data width
transmit / receive MSB first
idle clock line is HIGH
shift transmit data on leading clock edge
SSCCON :
8 or C
5
0
F
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