参数资料
型号: C8051F019-GQ
厂商: Silicon Laboratories Inc
文件页数: 17/154页
文件大小: 0K
描述: IC 8051 MCU 16K FLASH 48TQFP
产品培训模块: Serial Communication Overview
标准包装: 250
系列: C8051F018
核心处理器: 8051
芯体尺寸: 8-位
速度: 25MHz
连通性: SMBus(2 线/I²C),SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,温度传感器,WDT
输入/输出数: 16
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
RAM 容量: 1.25K x 8
电压 - 电源 (Vcc/Vdd): 2.8 V ~ 3.6 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-TQFP
包装: 托盘
其它名称: 336-1198
C8051F018
C8051F019
16. UART
The UART is a serial port capable of asynchronous transmission. The UART can function in full duplex mode. In
all modes, receive data is buffered in a holding register. This allows the UART to start reception of a second
incoming data byte before software has finished reading the previous data byte.
The UART has an associated Serial Control Register (SCON) and a Serial Data Buffer (SBUF) in the SFRs. The
single SBUF location provides access to both transmit and receive registers. Reads access the Receive register and
writes access the Transmit register automatically.
The UART is capable of generating interrupts if enabled. The UART has two sources of interrupts: a Transmit
Interrupt flag, TI (SCON.1) set when transmission of a data byte is complete, and a Receive Interrupt flag, RI
(SCON.0) set when reception of a data byte is complete. The UART interrupt flags are not cleared by hardware
when the CPU vectors to the interrupt service routine. They must be cleared manually by software. This allows
software to determine the cause of the UART interrupt (transmit complete or receive complete).
Figure 16.1. UART Block Diagram
SBUF
Shift
Load SBUF
SFR Bus
Input Shift Register
(9 bits)
Bit Detector
Read
SBUF
Rx Control
Start
Rx Clock
Load
SBUF
0x1FF
Shift
Tx Control
Tx Clock
Serial
Port
Interrupt
Tx IRQ
Zero Detector
Send
Shift
SBUF
SFR Bus
SET
Q
D
CLR
Stop Bit
Gen.
TB8
Start
01
00
10
11
SMOD
1
0
01
00
10
11
Timer 2
Overflow
TCLK
1
0
RCLK
1
0
Timer 1
Overflow
SCON
S
M
2
T
B
8
R
B
8
T
I
R
I
PCON
S
M
O
D
SMOD
Data
Write to
SBUF
S
M
1
S
M
0
R
E
N
Enable
REN
T2CON
R
C
L
K
T
C
L
K
SYSCLK
MSB
RB8
Rx IRQ
TI
RI
Crossbar
Baud Rate Generation Logic
Crossbar
RX
TX
Port I/O
1
0
32
64
12
SM0, SM1
{MODE}
16
2
113
Rev. 1.2
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