参数资料
型号: C8051F040DK-U
厂商: Silicon Laboratories Inc
文件页数: 9/16页
文件大小: 0K
描述: DEV KIT FOR F040/F041/F042/F043
标准包装: 1
其它名称: 336-1050
C8051F04DK-U
C8051F04x-DK
6.4. Serial Interface (J5)
A RS232 transceiver circuit and DB-9 (J5) connector are provided on the target board to facilitate serial connec-
tions to UART0 of the C8051F040. The TX, RX, RTS and CTS signals of UART0 may be connected to the DB-9
connector and transceiver by installing shorting blocks on headers J6, J8, J9 and J10.
J6
J9
J8
J10
- Install shorting block to connect UART0 TX (P0.0) to transceiver.
- Install shorting block to connect UART0 RX (P0.1) to transceiver.
- Install shorting block to connect UART0 RTS (P4.0) to transceiver.
- Install shorting block to connect UART0 CTS (P4.1) to transceiver.
6.5. Analog I/O (J11, J20)
Several C8051F040 analog signals are routed to the J20 terminal block and the J11 header. The J11 connector
provides the ability to connect DAC0 and DAC1 outputs to several different analog inputs by installing a shorting
block between a DAC output and an analog input on adjacent pins of J11. Refer to Table 3 for J20 terminal block
connections and Table 4 for J11 pin definitions.
Table 3. J20 Terminal Block Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
Description
HVAIN+
HVAIN-
HVREF
DAC1
AIN0.0
AIN0.1
VREF0
ADND (Analog Ground)
Table 4. J11 Connector Pin Descriptions
Pin #
1
2
3
4
5
6
Description
AIN0.0
AIN0.1
DAC0
DAC1
AIN0.2
AIN0.3
Rev. 0.6
9
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C8051F040-TB-K 功能描述:BOARD PROTOTYPING W/C8051F040 制造商:silicon labs 系列:- 零件状态:在售 板类型:评估平台 类型:MCU 8-位 核心处理器:8051 操作系统:- 平台:- 配套使用产品/相关产品:C8051F04x 安装类型:固定 内容:板 标准包装:1