参数资料
| 型号： | C8051F064EK-U |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 11/18页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL FOR C8051F064 |
| 标准包装： | 1 |
| 其它名称： | 336-1088 |
C8051F064-EK
9.5. Analog Inputs (J4, J5, J6, J8, J16, ADC0 [J13], ADC1 [J12])
Two BNC connectors (J13 (ADC0) and J12 (ADC1)) are provided on the C8051F064 board for easy evaluation of
the 16-bit on-chip ADCs. These analog inputs can be used to input an ac analog signal to the ADCs, ADC0 and
ADC1. Additionally, front-end circuitry is provided to condition the analog signals. To use this circuitry, follow the
guidelines listed below in conjunction with the schematic located in Section 10. See "AN190: Understanding ADC
Specifications" for a detailed discussion of issues related to ADC performance.
Select the 5 V supply voltage for the Voltage References U3 and U6 at header J4. Place a shorting block on J4,
Pin 1 and Pin 2, to select the DATA VBUS signal. Place a shorting block on J4, Pin 2 and Pin 3, to select the
DEBUG VBUS signal.
A single-supply voltage option is provided on the evaluation board for the op-amps. Place a shorting block on J6
to connect the "V+" op-amp supply to AV+. Additionally, place a shorting block on J8 to connect the "V–"
op-amp supply to GND.
Provide a dual-supply voltage to the op-amps for optimal performance by removing the shorting blocks on
headers J6 and J8. To supply the voltages, +5 V and –5 V signals will need to be provided at the J3 terminal
block (Pin 1 and Pin 2).
Note: Remove shorting blocks from J6 and J8 BEFORE applying voltages to the J3 terminal block. Voltages applied to J3
while shorting blocks are on J6 and J8 could cause damage to the evaluation board.
Provide an external Conversion Start signal to ADC0 at header J5 Pin 1.
Provide an external Conversion Start signal to ADC1 at header J5 Pin 2.
Differential measurement from one test source: input signal to ADC0 and place shorting block on header J16.
9.6. Analog I/O (Terminal Block [J3])
J3 is used to provide off-board voltage supply and voltage references for better noise performance evaluation in a
lab environment. Refer to Table 3 for terminal block connections.
Table 3. Terminal Block (J3) Pin Descriptions
Pin #
1
2
3
4
5
6
Description
–5 V
+5 V
AGND
GND
+3.3 VIN
5VDD
Rev. 0.4
11
相关PDF资料 |
PDF描述 |
|---|---|
| C8051F124DK-K | DEV KIT FOR F124/F125/F126/F127 |
| C8051F226DK-K | DEV KIT F220/221/226/230/231/236 |
| C8051F300DK-K | DEV KIT FOR F300/301/302/304/305 |
| C8051F310DK-K | DEV KIT FOR C8051F310/F311 |
| C8051F320DK-U | DEV KIT FOR C8051F320/F321 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| C8051F064-GQ | 功能描述:8位微控制器 -MCU 64KB 16ADC 100P MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| C8051F064-GQR | 功能描述:8位微控制器 -MCU 64KB 16ADC 100P MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| C8051F064R | 功能描述:8位微控制器 -MCU 64KB 16ADC 100Pin MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| C8051F065 | 功能描述:8位微控制器 -MCU 64KB 16ADC 64Pin MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| C8051F065-GQ | 功能描述:8位微控制器 -MCU 64KB 16ADC 64P MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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