参数资料
型号: C8051F220R
厂商: Silicon Laboratories Inc
文件页数: 65/146页
文件大小: 0K
描述: IC 8051 MCU 8K FLASH 48TQFP
标准包装: 1
系列: C8051F2xx
核心处理器: 8051
芯体尺寸: 8-位
速度: 25MHz
连通性: SPI,UART/USART
外围设备: 欠压检测/复位,POR,WDT
输入/输出数: 32
程序存储器容量: 8KB(8K x 8)
程序存储器类型: 闪存
RAM 容量: 256 x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 3.6 V
数据转换器: A/D 32x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-TQFP
包装: 剪切带 (CT)
其它名称: 336-1008-1
C8051F2xx
Rev. 1.6
25
4.
Pinout and Package Definitions
Table 4.1. Pin Definitions
Name
‘F206,
F220,
226,
230,
236
‘F221,
231
Type
Description
48-Pin 32-Pin
VDD
11,31
8
Digital Voltage Supply.
GND
5,6,8,
13,32
9
Ground. (
Note: Pins 5,6, and 8 on the 48-pin package are not
connected (NC), but it is recommended that they be connected to
ground.)
MONEN
12
D In
Monitor Enable (on 48 pin package ONLY). Enables reset volt-
age monitor function when pulled high (logic “1”).
TCK
25
17
D In
JTAG Test Clock with internal pull-up.
TMS
26
18
D In
JTAG Test-Mode Select with internal pull-up.
TDI
28
20
D In
JTAG Test Data Input with internal pull-up. TDI is latched on a
rising edge of TCK.
TDO
27
19
D Out JTAG Test Data Output. Data is shifted out on TDO on the falling
edge of TCK. TDO output is a tri-state driver.
XTAL1
9
6
A In
Crystal Input. This pin is the return for the internal oscillator cir-
cuit for a crystal or ceramic resonator. For a precision internal
clock, connect a crystal or ceramic resonator from XTAL1 to
XTAL2. If overdriven by an external CMOS clock, this becomes
the system clock.
XTAL2
10
7
A Out
Crystal Output. This pin is the excitation driver for a crystal or
ceramic resonator.
RST
14
10
D I/O
Chip Reset. Open-drain output of internal Voltage Supply moni-
tor. Is driven low when VDD is < 2.7V and MONEN=1, or when a
‘1’is written to PORSF. An external source can force a system
reset by driving this pin low.
VREF
7
5
A I/O
Voltage Reference. When configured as an input, this pin is the
voltage reference for the ADC. Otherwise, VDD will be the refer-
ence. NOTE: this pin is Not Connected (NC) on ‘F230/1/6.
CP0+
4
A In
Comparator 0 Non-Inverting Input.
CP0-
3
A In
Comparator 0 Inverting Input.
CP0
2
D Out
Comparator 0 Output
CP1+
1
A In
Comparator 1 Non-Inverting Input.
CP1-
48
32
A In
Comparator 1 Inverting Input.
CP1
47
31
D Out
Comparator 1 Output
P0.0/TX
40
28
D I/O
A In
Port0 Bit0. (See the Port I/O Sub-System section for complete
description).
P0.1/RX
39
27
D I/O
A In
Port0 Bit1. (See the Port I/O Sub-System section for complete
description).
P0.2/INT0
38
26
D I/O
A In
Port0 Bit2. (See the Port I/O Sub-System section for complete
description).
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