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| 型号： | C8051F226-TB |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | BOARD PROTOTYPING W/C8051F226 |
| 标准包装： | 1 |
| 类型： | MCU |
| 适用于相关产品： | C8051F226 |
| 所含物品： | 板 |
C8051F2xx-DK
6.6. Low-pass Filter (PWMIN)
The C8051F2xx target board features a low-pass filter that may be connected to port pin P2.7. Install a shorting
block on connector “PWMIN” to connect the P2.7 pin of the target device to the low-pass filter input. The output of
the low-pass filter is routed to the PWM signal at J6[6]. To route the PWM signal to the ADC on the target device, a
shorting block should be placed on “PWMIN”, and a shorting block placed on connector “P3.0AIN” (J5) or
“P3.1AIN” (J7). Connector J6 is used to connect the PWM voltage to the P3.0AIN or P3.1AIN signal routed to the
corresponding port pins (See Figure 3). These port pins are then configured for use by the ADC.
The C8051F2xx may be programmed to generate a PWM (Pulse-Width Modulated) waveform which is then input
to the low-pass filter to implement a user-controlled PWM digital-to-analog converter. Refer to Applications Note
AN110 - Implementing 16-Bit PWM Using an On-Chip Timer in the “ Documentation ” directory on the CD-ROM
for a discussion on generating a programmable dc voltage level with a PWM waveform and low-pass filter.
6.7. Expansion I/O Connector (J2)
The target board provides access to all C8051F2xx signals (except the four JTAG signals: TCK, TMS, TDO and
TDI used to connect the Emulation Cartridge – these are accessed using test points in place near the J4 header)
via the 64-pin connector J2. A small through-hole prototyping area is also provided. All I/O signals routed to
connector J2 are also routed to through-hole connection points between J2 and the prototyping area (see
Figure 2). The signal layout pattern of these connection points is identical to the adjacent J2 connector pins.
Table 5. J2 Pin Descriptions
Pin
1,46,64
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Description
+3 VD2 (voltage supply)
XTAL1
P1.6
P1.7
P1.4
P1.5
P1.2
P1.3
P1.0
P1.1
P0.6
P0.7
P0.4
P0.5
P0.2
P0.3
P0.0
P0.1
P2.6
Pin
21
22
23
24
25
26
27
28
29
30
31
32
33
34
36
39,41,42,45,47,63
48,50
53
62
Description
P2.4
P2.5
P2.2
P2.3
P2.0
P2.1
P3.6
P3.7
P3.4
P3.5
P3.2
P3.3
P3.0
P3.1
/RST
GND
PWM (pulse-width modulator)
VREF
VDDMONEN
8
20
P2.7
Rev. 0.6
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